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GLAST/LAT > DAQ and FSW > FSW > Doxygen Index > PBS / V2-10-5

Constituent: pbs     Tag: rad750

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REG.h.xx-ppc-gcc File Reference

Fetches the value of the PC and other specialized registers, implementation for PPC. More...

Defines
#define	REG_LR()
	Fetches the value of the current LR (link register).
#define	REG_MSR()
	Fetches the value of the current MSR (machine status register).
#define	REG_PC()
	Fetches the value of the current PC.
#define	REG_SP()
	Fetches the value of the current Stack Pointer.
#define	REG_PVR()
	Fetches the value the Processor Version Register.
#define	REG_SPR(_spr)
	Fetches the value the specified SPR.

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Detailed Description

Fetches the value of the PC and other specialized registers, implementation for PPC.

Author:

JJRussell - russell@slac.stanford.edu

    CVS $Id: REG.h.xx-ppc-gcc,v 1.4 2005/05/12 19:42:56 russell Exp $

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Define Documentation

#define REG_LR (   )

Value: ( \ { \ unsigned int *lr; \ asm volatile ("0: mflr %0": "=r"(lr)); \ lr; \ } \ ) Fetches the value of the current LR (link register). Returns: The value of LR where this macro is called Warning: The current value of the LR may or may not be what you are after. If the routine makes internal indirect calls, the LR may have already been overwritten. If you are after the value of the link register to determine the calling routine, the calling may or may not be the one on the stack depending on whether or not the current routine is a leaf or node routine i.e. does the current routine make calls). In essence, this is a let the buyer beware kind of routine. It is unfortunate, but there is no way to do the right thing .

#define REG_MSR (   )

Value: ( \ { \ unsigned int msr; \ asm volatile (" bl 0f \n \ 0: mfmsr %0": "=r"(msr)); \ msr; \ } \ ) Fetches the value of the current MSR (machine status register). Returns: The value of MSR where this macro is called

#define REG_PC (   )

Value: ( \ { \ unsigned int *pc; \ asm volatile (" bl 0f \n \ 0: mflr %0": "=r"(pc)); \ pc; \ } \ ) Fetches the value of the current PC. Returns: The value of PC where this macro is called The exact value of the PC is not specified and differs on an implementation by implementation basis. Since it is only meant to be indicate roughly where the PC is, this should cause no problems.

#define REG_PVR (   )

Value: ( \ { \ unsigned int pvr; \ asm volatile (" mfspr %0,287" :"=r"(pvr)); \ pvr; \ } \ ) Fetches the value the Processor Version Register. Returns: The value the Processor Version Register The contents of this register are documented in the PPC Programming Environments Manual, but basically one gets two 16 bit numbers, one specifying the processor version (type) in the upper 16 bits and the second specifying the processor revision in the lower 16 bits..

#define REG_SP (   )

Value: ( \ { \ unsigned int *sp; \ asm volatile (" mr %0,1" :"=r"(sp)); \ sp; \ } \ ) Fetches the value of the current Stack Pointer. Returns: The value of stack pointer where this macro is called The exact value of the SP is not specified and differs on an implementation by implementation basis. Since it is only meant to be indicate roughly where the SP is, this should cause no problems.

#define REG_SPR (  _spr   )

Value: ( \ { \ unsigned int spr; \ asm volatile (" mfspr %0," # _spr : "=r"(spr)); \ spr; \ } \ ) Fetches the value the specified SPR. Returns: The value the specified SPR Parameters: _spr  The SPR register number. The SPRs are documented in the PPC programming manuals. Only read access is provided by this facility. It is provided only as a convenience for exploration purposes. Formal use of these registers should be in the context of a supported facility, e.g. the Thermal Assist Unit registers are officially supported through the TAU facility.

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