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Constituent: sib_eeprom_test Tag: rad750
Interface Data Structures File List Data Fields Globals
sib_eeprom_test - SIB EEPROM hardware level test
sib_eeprom_test <drv> <chip>
This tests writes four test patterns into every location within an SIB EEPROM chip. A chip is defined as 128 KB x 4 (0.5 MB), or the size of one Austin EEPROM MCM. Values of 0xaaaaaaaa, 0x55555555, 0x00000000, and 0xffffffff are written and verified for each location. Errors are reported as encoutered. The drv parameter should be '0' for a lower EEPROM bank chip and '1' for an upper EEPROM bank chip. The chip parameter is an integer, and for standard SIB 3 MB EEPROM banks, should range from '0' to '5'.
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