GLAST / LAT > DAQ and FSW > FSW > Doxygen Index> LCBD / dev > test_bug / linux-gcc
#include <PBI/Endianness.h>
Classes | |
struct | _LCB_cmd_dsc_bf |
Map of LCB command (request,export) descriptor. More... | |
union | _LCB_cmd_dsc |
Union of the command (request, export) descriptor with an uninterpretted 32-bit integer. More... | |
struct | _LCB_rst_dsc_bfd |
Map of LCB result descriptor. More... | |
struct | _LCB_rst_dsc_bf |
Map of LCB result descriptor. More... | |
union | _LCB_rst_dsc |
union for 32-bit Result Descriptor More... | |
struct | _LCB_evt_dsc_bf |
Map of LCB event result descriptor with broken down status fields. More... | |
struct | _LCB_evt_dsc_bfe |
Map of LCB event result descriptor with error field as a single field (receive and transfer status combined). More... | |
union | _LCB_evt_dsc |
union for 32-bit Event Descriptor More... | |
struct | _LCB_prb |
Map of the LCB memory space PCI register block. More... | |
struct | _LCB_pci_csr_bf |
Map of the Memory space CSR pciister. More... | |
union | _LCB_pci_csr |
union for 32-bit CSR register More... | |
struct | _LCB_pci_irq_sets |
Map of the Memory space irq enable register, by sets. More... | |
struct | _LCB_pci_irq_bf |
Map of the Memory space irq register. More... | |
union | _LCB_pci_irq |
union for 32-bit irq register More... | |
struct | _LCB_pci_fabric_select_bf |
Bit field representation of the fabric select register. More... | |
struct | _LCB_pci_fabric_select |
Bit field representation of the fabric select register. More... | |
Defines | |
#define | LCB_PCI_VENDOR_ID ( 0x11AA ) |
16-bit PCI Vendor ID for LCB | |
#define | LCB_PCI_DEVICE_ID ( 0x0845 ) |
16-bit PCI Device ID for LCB | |
#define | LCB_RAD750_CACHELINE_SIZE (1 << 5) |
#define | LCB_RAD750_PREFETCH_SIZE (6 * LCB_RAD750_CACHELINE_SIZE) |
#define | LCB_REQUEST_LIST_ALIGN (1 << 9) |
Necessary byte alignment for a request/command list. | |
#define | LCB_REQUEST_LIST_PAD LCB_RAD750_PREFETCH_SIZE |
The size of the padding, in bytes, needed to ensure that request/ command list is protected against CPU accesses during the DMA operation. | |
#define | LCB_RESULT_LIST_ALIGN LCB_RAD750_CACHELINE_SIZE |
Necessary byte alignment for a result list. | |
#define | LCB_RESULT_LIST_MIN LCB_RAD750_PREFETCH_SIZE |
The minimum size, in bytes, needed to ensure that result list is protected against CPU accesses during the DMA operation. | |
#define | LCB_COMMAND_LIST_ALIGN LCB_REQUEST_LIST_ALIGN |
Necessary byte alignment for a request/command list. | |
#define | LCB_COMMAND_LIST_PAD LCB_REQUEST_LIST_PAD |
The size of the padding, in bytes, needed to ensure that request/ command list is protected against CPU accesses during the DMA operation. | |
#define | LCB_REQUEST_QUEUE_FULL 0xffffffff |
Value returned when the request queue is full, i.e. unable to accept a new request (command) list. | |
#define | LCB_REQUEST_QUEUE_NOT_EMPTY 0x00000000 |
Value returned when the request queue is not empty, i.e. the request queue has outstanding transactions. | |
#define | LCB_RESULT_QUEUE_EMPTY 0xfffffff7 |
Value returned when the result queue is read when empty. | |
#define | LCB_EVENT_QUEUE_EMPTY 0x7fffffff |
Value returned when the event queue is read when empty. | |
#define | LCB_REQUEST_LIST_MAX (4088/sizeof(int)) |
The maximum length, in 32-bit integers of a command list. | |
#define | LCB_EVT_PAYLOAD_MAX (255*16) |
The maximum number of bytes that can be sent in a LCB-to-LCB transfer. | |
#define | LCB_EVENT_BUFFER_SIZE ( 512 * 1024 ) |
Size, in bytes, of the LCB event circular buffer. | |
#define | LCB_EVENT_BUFFER_GUARD ( 128 * 1024 ) |
Size, in bytes, of the LCB event circular buffer guard area. | |
#define | LCB_EVENT_BUFFER_TOTAL (LCB_EVENT_BUFFER_SIZE+LCB_EVENT_BUFFER_GUARD) |
Size, in bytes, of the LCB event circular buffer + guard area. | |
#define | LCB_EVENT_BUFFER_ALIGN ( 1 << 20 ) |
Alignment factor, in bytes. | |
#define | LCB_EVT_PROTO_CNT 4 |
Number of protocols supported by the event fabric. | |
#define | LCB_EVT_PAD_SIZE 32 |
The size, in bytes, of the pad area left before each packet in the event ring buffer. | |
Typedefs | |
typedef enum _LCB_IRQ_COND | LCB_IRQ_COND |
Typedef for enum _LCB_IRQ_COND. | |
typedef enum _LCB_CMD_DSC_S | LCB_CMD_DSC_S |
Typedef for enum _LCB_CMD_DSC_S. | |
typedef enum _LCB_CMD_DSC_V | LCB_CMD_DSC_V |
Typedef for enum _LCB_CMD_DSC_V. | |
typedef enum _LCB_CMD_DSC_M | LCB_CMD_DSC_M |
Typedef for enum _LCB_CMD_DSC_M. | |
typedef struct _LCB_cmd_dsc_bf | LCB_cmd_dsc_bf |
Typedef of struct _LCB_cmd_dsc_bf. | |
typedef union _LCB_cmd_dsc | LCB_cmd_dsc |
Typedef for union _LCB_cmd_dsc. | |
typedef enum _LCB_RST_DSC_S | LCB_RST_DSC_S |
Typedef for enum _LCB_RST_DSC_S. | |
typedef enum _LCB_RST_DSC_V | LCB_RST_DSC_V |
Typedef for enum _LCB_RST_DSC_V. | |
typedef enum _LCB_RST_DSC_M | LCB_RST_DSC_M |
Typedef for enum _LCB_RST_DSC_M. | |
typedef struct _LCB_rst_dsc_bfd | LCB_rst_dsc_bfd |
Typedef for structure _LCB_rst_dsc_bfd. | |
typedef struct _LCB_rst_dsc_bf | LCB_rst_dsc_bf |
Typedef for structure _LCB_rst_dsc_bf. | |
typedef union _LCB_rst_dsc | LCB_rst_dsc |
typedef for union _LCB_rst_dsc | |
typedef enum _LCB_EVT_DSC_S | LCB_EVT_DSC_S |
Typedef for enum _LCB_EVT_DSC_S. | |
typedef enum _LCB_EVT_DSC_V | LCB_EVT_DSC_V |
Typedef for enum _LCB_EVT_DSC_V. | |
typedef enum _LCB_EVT_DSC_M | LCB_EVT_DSC_M |
Typedef for enum _LCB_EVT_DSC_M. | |
typedef struct _LCB_evt_dsc_bf | LCB_evt_dsc_bf |
typedef for struct _LCB_evt_dsc_bf | |
typedef struct _LCB_evt_dsc_bfe | LCB_evt_dsc_bfe |
typedef for struct _LCB_evt_dsc_bfe | |
typedef union _LCB_evt_dsc | LCB_evt_dsc |
typedef for union _LCB_evt_dsc | |
typedef enum _LCB_RST_ERR_XFR | LCB_RST_ERR_XFR |
Typedef for enum _LCB_RST_ERR_XFR. | |
typedef enum _LCB_RST_ERR_RCV | LCB_RST_ERR_RCV |
Typedef for enum _LCB_RST_ERR_RCV. | |
typedef enum _LCB_EVT_ERR_XFR | LCB_EVT_ERR_XFR |
Typedef for enum _LCB_EVT_ERR_XFR. | |
typedef enum _LCB_EVT_ERR_RCV | LCB_EVT_ERR_RCV |
Typedef for enum _LCB_EVT_ERR_RCV. | |
typedef struct _LCB_prb | LCB_prb |
Typedef for struct. | |
typedef enum _LCB_PCI_CSR_S | LCB_PCI_CSR_S |
Typedef for enum. | |
typedef enum _LCB_PCI_CSR_V | LCB_PCI_CSR_V |
Typedef for enum. | |
typedef enum _LCB_PCI_CSR_M | LCB_PCI_CSR_M |
Typedef for enum. | |
typedef enum _LCB_PCI_CSR_IRQEVTQUE_M | LCB_PCI_CSR_IRQEVTQUE_M |
Typedef for enum _LCB_PCI_IRQEVTQUE_M_. | |
typedef struct _LCB_pci_csr_bf | LCB_pci_csr_bf |
Typedef for struct. | |
typedef union _LCB_pci_csr | LCB_pci_csr |
typedef for union | |
typedef enum _LCB_IRQ_K | LCB_IRQ_K |
Typedef for the enum _LCB_IRQ_K. | |
typedef enum _LCB_IRQ_M | LCB_IRQ_M |
Typedef for the enum _LCB_IRQ_M. | |
typedef enum _LCB_PCI_IRQ_S | LCB_PCI_IRQ_S |
Typedef for enum _LCB_PCI_IRQ_S. | |
typedef enum _LCB_PCI_IRQ_V | LCB_PCI_IRQ_V |
Typedef for enum _LCB_PCI_IRQ_V. | |
typedef enum _LCB_PCI_IRQ_M | LCB_PCI_IRQ_M |
Typedef for enum _LCB_PCI_IRQ_M. | |
typedef struct _LCB_pci_irq_sets | LCB_pci_irq_sets |
Typedef for struct _LCB_pci_irq_sets. | |
typedef struct _LCB_pci_irq_bf | LCB_pci_irq_bf |
Typedef for struct _LCB_pci_irq_bf. | |
typedef union _LCB_pci_irq | LCB_pci_irq |
typedef for union _LCB_pci_irq | |
typedef enum _LCB_PCI_FABRIC_SELECT_PATH | LCB_PCI_FABRIC_SELECT_PATH |
Typedef for enum _LCB_PCI_FABRIC_SELECT_PATH. | |
typedef enum _LCB_PCI_FABRIC_SELECT_S | LCB_PCI_FABRIC_SELECT_S |
Typedef for enum _LCB_PCI_FABRIC_SELECT_S. | |
typedef enum _LCB_PCI_FABRIC_SELECT_V | LCB_PCI_FABRIC_SELECT_V |
Typedef for enum _LCB_PCI_FABRIC_SELECT_V. | |
typedef enum _LCB_PCI_FABRIC_SELECT_M | LCB_PCI_FABRIC_SELECT_M |
Typedef for enum _LCB_PCI_FABRIC_SELECT_M. | |
typedef struct _LCB_pci_fabric_select_bf | LCB_pci_fabric_select_bf |
Typedef for struct _LCB_pci_fabric_select_bf. | |
typedef struct _LCB_pci_fabric_select | LCB_pci_fabric_select |
Typedef for struct _LCB_pci_fabric_select. | |
Enumerations | |
enum | _LCB_IRQ_COND { LCB_IRQ_COND_75_FULL = 0x0, LCB_IRQ_COND_50_FULL = 0x1, LCB_IRQ_COND_25_FULL = 0x2, LCB_IRQ_COND_NOT_EMPTY = 0x3 } |
Enumerates the Interrupt Request conditions, both event buffer and event queue. More... | |
enum | _LCB_CMD_DSC_S { LCB_CMD_DSC_S_LEN = 9, LCB_CMD_DSC_S_ADR = 21 } |
Size, in bits, of the command descriptor fields. More... | |
enum | _LCB_CMD_DSC_V { LCB_CMD_DSC_V_LEN = 0, LCB_CMD_DSC_V_ADR = 9 } |
Right justified bit offsets of the command descriptor fields. More... | |
enum | _LCB_CMD_DSC_M { LCB_CMD_DSC_M_LEN = 0x000001FF, LCB_CMD_DSC_M_ADR = 0xFFFFFE00 } |
Masks of the command descriptor fields. More... | |
enum | _LCB_RST_DSC_S { LCB_RST_DSC_S_STATUS = 3, LCB_RST_DSC_S_DIR = 1, LCB_RST_DSC_S_XSTATUS = 4, LCB_RST_DSC_S_ADR = 28 } |
Size, in bits, of the result descriptor fields. More... | |
enum | _LCB_RST_DSC_V { LCB_RST_DSC_V_STATUS = 0, LCB_RST_DSC_V_XSTATUS = 0, LCB_RST_DSC_V_DIR = 3, LCB_RST_DSC_V_ADR = 4 } |
Right justified bit offsets of the result descriptor fields. More... | |
enum | _LCB_RST_DSC_M { LCB_RST_DSC_M_STATUS = 0x00000007, LCB_RST_DSC_M_DIR = 0x00000008, LCB_RST_DSC_M_XSTATUS = 0x0000000F, LCB_RST_DSC_M_ADR = 0xFFFFFFF0 } |
Masks of the result descriptor fields. More... | |
enum | _LCB_EVT_DSC_S { LCB_EVT_DSC_S_OFFSET = 17, LCB_EVT_DSC_S_LEN = 10, LCB_EVT_DSC_S_STATUS = 5, LCB_EVT_DSC_S_XSTATUS = 3, LCB_EVT_DSC_S_RSTATUS = 2 } |
Size, in bits, of the event descriptor fields. More... | |
enum | _LCB_EVT_DSC_V { LCB_EVT_DSC_V_OFFSET = 0, LCB_EVT_DSC_V_LEN = 17, LCB_EVT_DSC_V_STATUS = 27, LCB_EVT_DSC_V_XSTATUS = 27, LCB_EVT_DSC_V_RSTATUS = 30 } |
Right justified bit offsets of the event descriptor fields. More... | |
enum | _LCB_EVT_DSC_M { LCB_EVT_DSC_M_OFFSET = 0x0001FFFF, LCB_EVT_DSC_M_LEN = 0x07FE0000, LCB_EVT_DSC_M_STATUS = 0xF8000000, LCB_EVT_DSC_M_XSTATUS = 0x38000000, LCB_EVT_DSC_M_RSTATUS = 0xC0000000 } |
Masks of the event descriptor fields. More... | |
enum | _LCB_RST_ERR_XFR { LCB_RST_ERR_XFR_OUT_SUCCESS = 0, LCB_RST_ERR_XFR_OUT_PCI_MASTER_ABORT = 1, LCB_RST_ERR_XFR_OUT_PCI_PARITY_ERROR = 2, LCB_RST_ERR_XFR_OUT_PCI_TARGET_ABORT = 3, LCB_RST_ERR_XFR_OUT_UNDEFINED_4 = 4, LCB_RST_ERR_XFR_OUT_BUFFER_EMPTY = 5, LCB_RST_ERR_XFR_OUT_UNDEFINED_6 = 6, LCB_RST_ERR_XFR_OUT_Q_EMPTY = 7, LCB_RST_ERR_XFR_IN_SUCCESS = 8, LCB_RST_ERR_XFR_IN_PCI_MASTER_ABORT = 9, LCB_RST_ERR_XFR_IN_PCI_PARITY_ERROR = 10, LCB_RST_ERR_XFR_IN_PCI_TARGET_ABORT = 11, LCB_RST_ERR_XFR_IN_UNDEFINED_4 = 12, LCB_RST_ERR_XFR_IN_UNDEFINED_5 = 13, LCB_RST_ERR_XFR_IN_UNDEFINED_6 = 14, LCB_RST_ERR_XFR_IN_UNDEFINED_7 = 15, LCB_RST_ERR_XFR_CNT = 16 } |
Enumeration of possible LCB RESULT in/out errors. More... | |
enum | _LCB_RST_ERR_RCV { LCB_RST_ERR_RCV_SUCCESS = 0, LCB_RST_ERR_RCV_INVALID_HEADER_PARITY = 1, LCB_RST_ERR_RCV_INVALID_DATA_PARITY = 2, LCB_RST_ERR_RCV_UNDEFINED_3 = 3, LCB_RST_ERR_RCV_TRANSMIT_UNDERRUN = 4, LCB_RST_ERR_RCV_TIMEOUT = 5, LCB_RST_ERR_RCV_INVALID_LIST = 6, LCB_RST_ERR_RCV_UNDEFINED_7 = 7, LCB_RST_ERR_RCV_CNT = 8 } |
Enumeration of possible LCB RESULT receive errors in result items. More... | |
enum | _LCB_EVT_ERR_XFR { LCB_EVT_ERR_XFR_SUCCESS = 0, LCB_EVT_ERR_XFR_PCI_MASTER_ABORT = 1, LCB_EVT_ERR_XFR_PCI_PARITY_ERROR = 2, LCB_EVT_ERR_XFR_PCI_TARGET_ABORT = 3, LCB_EVT_ERR_XFR_UNDEFINED_4 = 4, LCB_EVT_ERR_XFR_BUFFER_EMPTY = 5, LCB_EVT_ERR_XFR_UNDEFINED_6 = 6, LCB_EVT_ERR_XFR_Q_EMPTY = 7, LCB_EVT_ERR_XFR_CNT = 8 } |
Enumeration of possible EVENT transfer errros. More... | |
enum | _LCB_EVT_ERR_RCV { LCB_EVT_ERR_RCV_SUCCESS = 0, LCB_EVT_ERR_RCV_UNDEFINED_1 = 1, LCB_EVT_ERR_RCV_INVALID_DATA_PARITY = 2, LCB_EVT_ERR_RCV_PACKET_TRUNCATED = 3, LCB_EVT_ERR_RCV_CNT = 4 } |
Enumeration of possible LCB receive errors. More... | |
enum | _LCB_PCI_CSR_S { LCB_PCI_CSR_S_INHBREQX = 1, LCB_PCI_CSR_S_INHBRSTX = 1, LCB_PCI_CSR_S_INHBEVTX = 1, LCB_PCI_CSR_S_IRQEVTQUE = 2, LCB_PCI_CSR_S_MBZ = 2, LCB_PCI_CSR_S_CLK = 1, LCB_PCI_CSR_S_UNUSED1 = 23, LCB_PCI_CSR_S_LCB_RESET = 1 } |
Defines the size, in bits, for the various fields. More... | |
enum | _LCB_PCI_CSR_V { LCB_PCI_CSR_V_INHBREQX = 0, LCB_PCI_CSR_V_INHBRSTX = 1, LCB_PCI_CSR_V_INHBEVTX = 2, LCB_PCI_CSR_V_IRQEVTQUE = 3, LCB_PCI_CSR_V_MBZ = 5, LCB_PCI_CSR_V_CLK = 7, LCB_PCI_CSR_V_UNUSED1 = 8, LCB_PCI_CSR_V_LCB_RESET = 31 } |
Defines right shift amounts for the various fields. More... | |
enum | _LCB_PCI_CSR_M { LCB_PCI_CSR_M_INHBREQX = 0x00000001, LCB_PCI_CSR_M_INHBRSTX = 0x00000002, LCB_PCI_CSR_M_INHBEVTX = 0x00000004, LCB_PCI_CSR_M_IRQEVTQUE = 0x00000018, LCB_PCI_CSR_M_MBZ = 0x00000060, LCB_PCI_CSR_M_CLK = 0x00000080, LCB_PCI_CSR_M_UNUSED1 = 0x7fffff00, LCB_PCI_CSR_M_LCB_RESET = 0x80000000 } |
Defines bit masks for the various fields. More... | |
enum | _LCB_PCI_CSR_IRQEVTQUE_M { LCB_PCI_CSR_IRQEVTQUE_M_COND_75_FULL, LCB_PCI_CSR_IRQEVTQUE_M_COND_50_FULL, LCB_PCI_CSR_IRQEVTQUE_M_COND_25_FULL, LCB_PCI_CSR_IRQEVTQUE_M_COND_NOT_EMPTY } |
Enumerates the event buffer interrupt conditions as in place values. More... | |
enum | _LCB_IRQ_K { LCB_IRQ_K_RESULT = 0, LCB_IRQ_K_EVENT = 1, LCB_IRQ_K_CLK_ON = 2, LCB_IRQ_K_CLK_OFF = 3, LCB_IRQ_K_SRC_CNT = 4 } |
Enumerates the 4 interrupt sources. More... | |
enum | _LCB_IRQ_M { LCB_IRQ_M_RESULT = (1 << LCB_IRQ_K_RESULT), LCB_IRQ_M_EVENT = (1 << LCB_IRQ_K_EVENT), LCB_IRQ_M_CLK_ON = (1 << LCB_IRQ_K_CLK_ON), LCB_IRQ_M_CLK_OFF = (1 << LCB_IRQ_K_CLK_OFF), LCB_IRQ_M_CLKS } |
Enumerates the bit mask for the 4 interrupt sources. More... | |
enum | _LCB_PCI_IRQ_S { LCB_PCI_IRQ_S_ENABLE = 4, LCB_PCI_IRQ_S_ENABLE_RESULT = 1, LCB_PCI_IRQ_S_ENABLE_EVENT = 1, LCB_PCI_IRQ_S_ENABLE_CLK_ON = 1, LCB_PCI_IRQ_S_ENABLE_CLK_OFF = 1, LCB_PCI_IRQ_S_DISABLE = 4, LCB_PCI_IRQ_S_DISABLE_RESULT = 1, LCB_PCI_IRQ_S_DISABLE_EVENT = 1, LCB_PCI_IRQ_S_DISABLE_CLK_ON = 1, LCB_PCI_IRQ_S_DISABLE_CLK_OFF = 1, LCB_PCI_IRQ_S_PENDING = 4, LCB_PCI_IRQ_S_PENDING_RESULT = 1, LCB_PCI_IRQ_S_PENDING_EVENT = 1, LCB_PCI_IRQ_S_PENDING_CLK_ON = 1, LCB_PCI_IRQ_S_PENDING_CLK_OFF = 1, LCB_PCI_IRQ_S_CBUF = 4, LCB_PCI_IRQ_S_CBUF_ENABLE = 1, LCB_PCI_IRQ_S_CBUF_DISABLE = 1, LCB_PCI_IRQ_S_CBUF_PENDING_BUF = 1, LCB_PCI_IRQ_S_CBUF_PENDING_QUE = 1, LCB_PCI_IRQ_S_UNUSED1 = 16 } |
Enumerates bit sizes of the IRQ enable/disable/pending fields. More... | |
enum | _LCB_PCI_IRQ_V { LCB_PCI_IRQ_V_ENABLE = 0, LCB_PCI_IRQ_V_ENABLE_RESULT = LCB_PCI_IRQ_V_ENABLE + LCB_IRQ_K_RESULT, LCB_PCI_IRQ_V_ENABLE_EVENT = LCB_PCI_IRQ_V_ENABLE + LCB_IRQ_K_EVENT, LCB_PCI_IRQ_V_ENABLE_CLK_ON = LCB_PCI_IRQ_V_ENABLE + LCB_IRQ_K_CLK_ON, LCB_PCI_IRQ_V_ENABLE_CLK_OFF = LCB_PCI_IRQ_V_ENABLE + LCB_IRQ_K_CLK_OFF, LCB_PCI_IRQ_V_DISABLE = 4, LCB_PCI_IRQ_V_DISABLE_RESULT = LCB_PCI_IRQ_V_DISABLE + LCB_IRQ_K_RESULT, LCB_PCI_IRQ_V_DISABLE_EVENT = LCB_PCI_IRQ_V_DISABLE + LCB_IRQ_K_EVENT, LCB_PCI_IRQ_V_DISABLE_CLK_ON = LCB_PCI_IRQ_V_DISABLE + LCB_IRQ_K_CLK_ON, LCB_PCI_IRQ_V_DISABLE_CLK_OFF = LCB_PCI_IRQ_V_DISABLE + LCB_IRQ_K_CLK_OFF, LCB_PCI_IRQ_V_PENDING = 8, LCB_PCI_IRQ_V_PENDING_RESULT = LCB_PCI_IRQ_V_PENDING + LCB_IRQ_K_RESULT, LCB_PCI_IRQ_V_PENDING_EVENT = LCB_PCI_IRQ_V_PENDING + LCB_IRQ_K_EVENT, LCB_PCI_IRQ_V_PENDING_CLK_ON = LCB_PCI_IRQ_V_PENDING + LCB_IRQ_K_CLK_ON, LCB_PCI_IRQ_V_PENDING_CLK_OFF = LCB_PCI_IRQ_V_PENDING + LCB_IRQ_K_CLK_OFF, LCB_PCI_IRQ_V_CBUF = 12, LCB_PCI_IRQ_V_CBUF_ENABLE = 12, LCB_PCI_IRQ_V_CBUF_DISABLE = 13, LCB_PCI_IRQ_V_CBUF_PENDING_BUF = 14, LCB_PCI_IRQ_V_CBUF_PENDING_QUE = 15, LCB_PCI_IRQ_V_UNUSED1 = 16 } |
Enumerates right justified bit offsets the IRQ enable/disable/pending bits. More... | |
enum | _LCB_PCI_IRQ_M { LCB_PCI_IRQ_M_ENABLE_RESULT = (1 << LCB_PCI_IRQ_V_ENABLE_RESULT), LCB_PCI_IRQ_M_ENABLE_EVENT = (1 << LCB_PCI_IRQ_V_ENABLE_EVENT), LCB_PCI_IRQ_M_ENABLE_CLK_ON = (1 << LCB_PCI_IRQ_V_ENABLE_CLK_ON), LCB_PCI_IRQ_M_ENABLE_CLK_OFF = (1 << LCB_PCI_IRQ_V_ENABLE_CLK_OFF), LCB_PCI_IRQ_M_ENABLE_QUES, LCB_PCI_IRQ_M_ENABLE_CLKS, LCB_PCI_IRQ_M_ENABLE_ALL, LCB_PCI_IRQ_M_DISABLE_RESULT = (1 << LCB_PCI_IRQ_V_DISABLE_RESULT), LCB_PCI_IRQ_M_DISABLE_EVENT = (1 << LCB_PCI_IRQ_V_DISABLE_EVENT), LCB_PCI_IRQ_M_DISABLE_CLK_ON = (1 << LCB_PCI_IRQ_V_DISABLE_CLK_ON), LCB_PCI_IRQ_M_DISABLE_CLK_OFF = (1 << LCB_PCI_IRQ_V_DISABLE_CLK_OFF), LCB_PCI_IRQ_M_DISABLE_QUES, LCB_PCI_IRQ_M_DISABLE_CLKS, LCB_PCI_IRQ_M_DISABLE_ALL, LCB_PCI_IRQ_M_PENDING_RESULT = (1 << LCB_PCI_IRQ_V_PENDING_RESULT), LCB_PCI_IRQ_M_PENDING_EVENT = (1 << LCB_PCI_IRQ_V_PENDING_EVENT), LCB_PCI_IRQ_M_PENDING_CLK_ON = (1 << LCB_PCI_IRQ_V_PENDING_CLK_ON), LCB_PCI_IRQ_M_PENDING_CLK_OFF = (1 << LCB_PCI_IRQ_V_PENDING_CLK_OFF), LCB_PCI_IRQ_M_PENDING_QUES, LCB_PCI_IRQ_M_PENDING_CLKS, LCB_PCI_IRQ_M_PENDING_ALL, LCB_PCI_IRQ_M_CBUF_ENABLE = (1 << LCB_PCI_IRQ_V_CBUF_ENABLE), LCB_PCI_IRQ_M_CBUF_DISABLE = (1 << LCB_PCI_IRQ_V_CBUF_DISABLE), LCB_PCI_IRQ_M_CBUF_PENDING_BUF = (1 << LCB_PCI_IRQ_V_CBUF_PENDING_BUF), LCB_PCI_IRQ_M_CBUF_PENDING_QUE = (1 << LCB_PCI_IRQ_V_CBUF_PENDING_QUE), LCB_PCI_IRQ_M_CBUF, LCB_PCI_IRQ_M_UNUSED1 = 0xffff0000 } |
Enumerates the IRQ enable/disable/pending bits. More... | |
enum | _LCB_PCI_FABRIC_SELECT_PATH { LCB_PCI_FABRIC_SELECT_PATH_K_PRIMARY = 0, LCB_PCI_FABRIC_SELECT_PATH_K_REDUNDANT = 1 } |
Enumerates the possible values of the path field in the fabric select register. More... | |
enum | _LCB_PCI_FABRIC_SELECT_S { LCB_PCI_FABRIC_SELECT_S_PATH = 1, LCB_PCI_FABRIC_SELECT_S_UNUSED = 31 } |
Enumerates the size, in bits, of the fields in the fabric select register. More... | |
enum | _LCB_PCI_FABRIC_SELECT_V { LCB_PCI_FABRIC_SELECT_V_PATH = 0, LCB_PCI_FABRIC_SELECT_V_UNUSED = 1 } |
Enumerates the right justified bit offsets of the fields in the fabric select register. More... | |
enum | _LCB_PCI_FABRIC_SELECT_M { LCB_PCI_FABRIC_SELECT_M_PATH = (1 << LCB_PCI_FABRIC_SELECT_V_PATH), LCB_PCI_FABRIC_SELECT_M_UNUSED = (0xFFFFFFFE) } |
Enumerates the mask field of the fields in the fabric select register. More... |
CVS $Id
#define LCB_COMMAND_LIST_ALIGN LCB_REQUEST_LIST_ALIGN |
Necessary byte alignment for a request/command list.
This is a synomyn for LCB_REQUEST_ALIGN. In many places in the LCB software the request list is referred to as the command list.
#define LCB_COMMAND_LIST_PAD LCB_REQUEST_LIST_PAD |
The size of the padding, in bytes, needed to ensure that request/ command list is protected against CPU accesses during the DMA operation.
#define LCB_EVT_PAD_SIZE 32 |
The size, in bytes, of the pad area left before each packet in the event ring buffer.
#define LCB_EVT_PAYLOAD_MAX (255*16) |
The maximum number of bytes that can be sent in a LCB-to-LCB transfer.
The transfer is always in units of an integer number of LATp cells which are 16 bytes. The LCB can transfer a max of 255 LATp cells. This number is defined as the maximum size of the payload. The definition of the payload includes the 2 bytes used for the mandatory LATp header. Said another way, the maximum size of user part of the payload is this number less the 2 bytes for the LATp header.
#define LCB_EVT_PROTO_CNT 4 |
Number of protocols supported by the event fabric.
When sending of receiving data on the event fabric, the data packet always contains a 16-bit LATp cell header word. Within this header word resides a two bits protocol field. The receiving LATp node may use this protocol field to aid in determining the nature of the nature. If the receiving node is a CPU, then the software may chose to use the protocol field to route the data packet to the proper handler. In the case where the receiving node is the Event Builder, the protocol field determines whether to build the event or to simple pass it on to its LATp destination addres.
#define LCB_REQUEST_LIST_MAX (4088/sizeof(int)) |
The maximum length, in 32-bit integers of a command list.
#define LCB_REQUEST_LIST_PAD LCB_RAD750_PREFETCH_SIZE |
The size of the padding, in bytes, needed to ensure that request/ command list is protected against CPU accesses during the DMA operation.
#define LCB_RESULT_LIST_MIN LCB_RAD750_PREFETCH_SIZE |
The minimum size, in bytes, needed to ensure that result list is protected against CPU accesses during the DMA operation.
If the CPU addesses a memory location in the same cache line that the bridge chip is accessing with a read operation, the RAD750's bridge will hang. Given that the bridge chip can prefetch as many as 6 cache lines, one way to protect against this is to always ensure that the result list is at least 6 cache lines in length.
Typedef for enum _LCB_EVT_ERR_XFR.
Typedef for the enum _LCB_IRQ_K.
Typedef for enum _LCB_PCI_FABRIC_SELECT_PATH.
This enumerates the possible value of the path field in the fabric select register. Currently only 1 bit is defined.
Typedef for struct _LCB_pci_irq_bf.
Typedef for enum _LCB_PCI_IRQ_M.
It is illegal to simoultaneously request the same interrupt to be both enable and disabled. The enable/dis
Typedef for enum _LCB_PCI_IRQ_S.
Typedef for struct _LCB_pci_irq_sets.
Typedef for enum _LCB_PCI_IRQ_V.
Typedef for struct.
typedef for union _LCB_rst_dsc
Typedef for structure _LCB_rst_dsc_bf.
Typedef for structure _LCB_rst_dsc_bfd.
enum _LCB_CMD_DSC_M |
enum _LCB_CMD_DSC_S |
enum _LCB_CMD_DSC_V |
enum _LCB_EVT_DSC_M |
Masks of the event descriptor fields.
enum _LCB_EVT_DSC_S |
Size, in bits, of the event descriptor fields.
enum _LCB_EVT_DSC_V |
Right justified bit offsets of the event descriptor fields.
enum _LCB_EVT_ERR_RCV |
Enumeration of possible LCB receive errors.
These are errors that the LCB detects when accepting data from a LATp event fabric. These map the 2-bit field in event descriptor.
enum _LCB_EVT_ERR_XFR |
Enumeration of possible EVENT transfer errros.
These errors occur when the LCB transfers data across the PCI bus into the circular buffer.
enum _LCB_IRQ_COND |
Enumerates the Interrupt Request conditions, both event buffer and event queue.
enum _LCB_IRQ_K |
Enumerates the 4 interrupt sources.
enum _LCB_IRQ_M |
Enumerates the event buffer interrupt conditions as in place values.
enum _LCB_PCI_CSR_M |
Defines bit masks for the various fields.
enum _LCB_PCI_CSR_S |
Defines the size, in bits, for the various fields.
;
enum _LCB_PCI_CSR_V |
Defines right shift amounts for the various fields.
enum _LCB_PCI_IRQ_M |
Enumerates the IRQ enable/disable/pending bits.
enum _LCB_PCI_IRQ_S |
Enumerates bit sizes of the IRQ enable/disable/pending fields.
enum _LCB_PCI_IRQ_V |
Enumerates right justified bit offsets the IRQ enable/disable/pending bits.
enum _LCB_RST_DSC_M |
enum _LCB_RST_DSC_S |
Size, in bits, of the result descriptor fields.
enum _LCB_RST_DSC_V |
Right justified bit offsets of the result descriptor fields.
enum _LCB_RST_ERR_RCV |
Enumeration of possible LCB RESULT receive errors in result items.
These are errors that the LCB detects when accepting data from a LATp fabric. That is these errors occur when the LCB reads response data.
The documentation only defines errors up to number 6, for a maximum of 7 errors. However the code index this with a 3-bit field. To be safe all 8 states must be covered
Code number 6 bears some special explanation. This happens when the LCB is asked to execute an illegal of inconsistent list. Examples of such lists are
Since the inconsistency may be encountered at any point during the execution of the request list, the error cannot practically be reported in the result descriptor. (Perhaps it can, but the LCB has potentially already started writing the result list, so..) Anyway for whatever reason, this error is reported in the result item. Since the LCB does not in all cases know what the opcode of the request item is, the result item is always filled in with as OPCODE 0 result item with a length of 2 words and the error word set to 6.
The proper response by the software when encountering such an item is to immediately stop processing the result items.
enum _LCB_RST_ERR_XFR |
Enumeration of possible LCB RESULT in/out errors.
These errors occur when the LCB imports/exports data from the single board computer across the PCI bus and are reported as the low 4 bits of the result descriptor. Note that in/out is from the perspective of the LCB and includes both the 3 bit status field as well as the 1 bit direction flag.