Instructions for RTEMS evgTest users                    
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I - Correct and build the xxxxApp application:
----------------------------------------------

(0) Install and build the event, generalTime, and miscUtils 
    modules from the LCLS CVS repository if not already done:  

    http://www.slac.stanford.edu/cgi-wrap/cvsweb/epics/site/src/?cvsroot=LCLS

(1) Correct EPICS_BASE, MSI, and the EVENT module in xxxxApp/configure/RELEASE.

(2) Clean/rebuild.

(3) The following document describes the database records that are unique to 
    the event system,and some of the usage.  The document has not yet been 
    updated for the newest versions of the EVG and EVR (version 200 and above)
    but is still a good reference: 

    http://www.slac.stanford.edu/grp/lcls/controls/global/subsystems/timing/globalEventV3.htm	

(4) To do detail testing (ie, using the EVG diagnostics display) or to
    change the databases provided in this application, use the
    the EVG reference manual from Micro-Research Finland Oy as reference:

    http://www.slac.stanford.edu/grp/lcls/controls/global/subsystems/timing/uResearch/230/EVG-230TREF-001.pdf

(5) To do low-level testing via register reads and write without EPICS, use 
    this writeup by John Dusatko as a guide.  It also has some system 
    configuration information:

    http://www.slac.stanford.edu/grp/lcls/controls/global/subsystems/timing/test_system_register_setup.doc


II - Adding EVG database and configuration to your IOC startup file:
---------------------------------------------------------------------------

(1) See xxxxApp/iocBoot/ioc-test-ev01/st.cmd for an example.

(2) Load evgTest.db created in the previous section (before iocInit):

    dbLoadRecords("db/evgTest.db")

(3) Add EgConfigure for each EVG before iocInit.

    EgConfigure(<instance>,<address>,<internalClock>)

    where instance = EVG instance, starting from 0, incrementing by 1
                     for each subsequent card
    and   address  = VME card address, starting from 0x280000, 
                     incrementing by 0x100000 for each subsequent card
    and   clock    = Internal clock flag:
			0 = use external clock
			1 = use internal clock

III - EVG Diagnostics Display:
------------------------------

(1) Once the IOC has booted successfully, bring up the EVG diagnostics display:

    cd xxxxApp/eventTestApp/edm
    edm -x -m "LOCA=TEST,UNIT=EV01" evgTestDiags.edl

    Check that the "FPGA Version" is correct and the board is enabled.

    Most of the fields on this display do not apply to EVG usage at SLAC.
    The EVG reference manual (see section I) describes the different 
    concepts referred to on this display.  

(2) Bring up the EVG data display by pushing the "Data" button on the 
    EVG diagnostics display.  Use this display to enter 12 integer values
    to be sent out as data to the EVRs.  Note that entering any value will
    immediately send out the data (this can be fixed if it's a hassle).
    Once values are entered, the data can be sent by  pushing the "Send" 
    button under the "One-Shot" heading.  To periodically send the data,
    select the time interval using the menu button under the "Periodic Sends" 
    heading.  To stop the sending, set the menu button back to "Passive".

(3) Bring up the EVG event display by pushing the "Events" button on the 
    EVG diagnostics display.  Use this display to enter event codes and 
    delays that are output by the EVG.  The delay is from the beginning 
    of the sequence that the EVG sends out when triggered.  The EVG 
    maintains two sequences and the sequence must be chosen per event code. 
    Note that the sequence RAM must be Off before any change on this display 
    is actually used by the sequence (when it is reactivated).

(4) To manually trigger a sequence when no external trigger is available,
    set one of the sequence RAMs (sequence RAM 1 if all event codes are 
    set up in sequence RAM 1) into a non-OFF state and push the "Send" 
    button under the "One-Shot" heading in the Sequence RAM block of the EVG 
    display.  The following action will happen depending on the state of
    the sequence RAM:

    (a) Normal - the sequence is sent out once with every "Send" button push.
    (b) Normal Recycle - the sequence is sent out continuously after a
        single "Send" button push.  Set the sequence RAM to "Off" to stop.
    (c) Single - the sequence is sent out once with the first "Send" button
        push.  The sequence RAM must be set to "Off" and back to "Single"
        to send out again. 
    (d) Alternate - both sequence RAMs must be in "Alternate" mode for
        the "Send" to work.  Push the "Send" for sequence RAM 1 only.  
        Both sequences will be sent out on every sequence RAM 1 "Send" 
        button push.

(5) To periodically trigger a sequence when no external trigger is available,
    set one of the sequence RAMs (sequence RAM 1 if all event codes are 
    set up in sequence RAM 1) into either "Normal" or "Alternate" state and  
    select the time interval to send the sequence using the menu button under 
    the  "Periodic Sends" heading in the Sequence RAM block of the EVG 
    display.  To stop the sending, set the menu button back to "Passive".

(6) To externally trigger a sequence using a pulse generator connected to 
    the AC line input, talk to John Dusatko about the cabling and other
    hardware requirements.  From the EVG diagnostic display, set 
    "AC Line Input" to "YES" for each sequence you want triggered.   Make 
    sure "Periodic Sends" is set to passive for both sequences.  If applicable,
    set the Divisor and Phase under the "AC Inputs" block of the EVG 
    diagnostics display.  Set the sequence RAM state to a non-OFF state 
    (except "Single"). 


IV - EVG Diagnostics from the Console:
--------------------------------------

(1) There is currently no driver report via EPICS dbior.

(2) To access the hardware directly, without using EPICS records, at the
    console prompt:

    Cexp> EG()
    Enter 0 (for the first EVG).
    Then enter a selection:  
    r - Reset everything on the event generator
    z - dump control and event mask regs
    m - turn on the master enable
    1 - configure sequence RAM 1
    2 - configure sequence RAM 2
    q - quit and return to vxWorks shell
    gnnn - generate a one-shot event number nnn
    annn - read RAM 1 position nnn
    bnnn - read RAM 2 position nnn

(3) To access registers directly, use writeup by John Dusatko (see section I) 
    as a guide.

    To display register(s):
    Cexp>md.help()

        int md (unsigned address, int count, int word_size)

Dump memory. Dump 'count' bytes starting at 'address' using a word length of
'word_size' bytes ('4', '2' or '1' - defaults to '4').

    To display all registers:
    Cexp>md(0x9f280000,512,2)

    To write to a register:
    Cexp>mm.help()

        int mm (unsigned address, int word_size)

Inspect and modify memory. Type '.' to exit, '^' / 'v' to change directions.
'word_size' can be '4', '2', or '1' bytes - defaults to '4'

    To write to the first register:
    Cexp>mm(0x9f280000,2)
