Up: 4kHz MCOR PS Control
Previous: 4kHz Readback History
The state machine is responsible for computing DAC setpoints
(among other things, this involves scaling according to the
calibration, which is a topic not discussed here) and for
processing ADC readbacks (writing history buffers and running
decimation filters for slow readbacks).
The state machine is always driven by the 4kHz (Frev/320)
timestamp / clock facility (sidenote: should this clock signal
be lost, the software tries to switch to an internal 4kHz
clock mode - global synchronization will be lost, however).