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                60.1    INPUTS . . . . . . . . . . . . . . . . . . . . .  60-1
                60.2    OUTPUTS  . . . . . . . . . . . . . . . . . . . .  60-1
                60.2.1    Delay Increments . . . . . . . . . . . . . . .  60-1
                60.3    CAMAC CODES  . . . . . . . . . . . . . . . . . .  60-1
                60.4    DRAWING PACKAGE NUMBER . . . . . . . . . . . . .  60-2
                60.5    RESPONSIBLE ENGINEERS  . . . . . . . . . . . . .  60-2

                                      CHAPTER 60
                               VERNIER DELAY UNIT (VDU)
        The basic building block for this unit is a 4-bit  programmable  logic
        delay  line.   The  Vernier  Delay Unit consists of two channels, each
        with two delay lines in series; the inputs to these  channels  may  be
        selected  from  the  auxiliary  backplane  or  from the front panel by
        program control.  Note that there is a minimum delay of the  order  of
        ~7 nanoseconds from the input to output.

        60.1  INPUTS

              o  Auxiliary backplane -:  differential ECL, channel 0 from  pdu
                 Ch 9, Channel 1 from PDU Ch A.
              o  Front panel -:  NIM on LEMO.

        60.2  OUTPUTS

        FRONT PANEL -:  Differential NIM on LEMO; +5  volts,  1/2  microsecond
        into 50 Ohms on BNC.

        60.2.1  Delay Increments

        For the kickers in the damping ring, a binary increment in the program
        control will correspond to a 0.1 nanosecond step in the delay.
        Total Range=10.5 nanoseconds.
        ______________________________
        This chapter is adapted from a memo by L.  Paffrath, W.   Pierce,  and
        D.   Horelick  dated  8/11/83  and titled "Revised Specification for a
        Vernier Delay Unit 135-756."



        VERNIER DELAY UNIT (VDU)                                     Page 60-2


        60.3  CAMAC CODES

              o  Power On, F9 Ax S2, Z*S2 will disable all outputs  and  clear
                 all channels.
              o  F0 A0,A1:  Read the contents  of  the  delay  register.   Q=1
                 implies  that the auxiliary backplane is selected AND channel
                 (0-1) is enabled.
              o  F1 A0,A1:  Read the contents  of  the  delay  register.   Q=1
                 implies that the front panel is selected AND channel (0-1) is
                 enabled.
              o  F10 A0,A1:  Disable channel (0-1).
              o  F16 A0,A1:  WRITE W1-W7 into channel  0  or  1,  in  straight
                 binary.
                 This  command  also  selects  the  auxiliary  backplane,  and
                 enables the output.  W8 is connected, but used in calibration
                 only.
              o  F17 A0,A1:  Same as F16A(0-1)  except  that  the  inputs  are
                 selected from the front panel.
              o  F25 A0, A1:  Enable channel (0-1).  Enable rear panel input.
              o  F26 A0,A1:  Enable channel (0-1).  Enable front panel input.
              o  F27 A0,A1:  Q=1 implies that channel (0-1) is enabled.

        60.4  DRAWING PACKAGE NUMBER

        135-756

        60.5  RESPONSIBLE ENGINEERS

        L.  Paffrath / W.  Pierce / D.  Horelick