CHAPTER 58 VIDEO DIGITIZER CLOCK INTERFACE (VDCI) Video Digitizer Clock Interface INTRODUCTION The VDCI is a single-width CAMAC module. It is used in conjunction with a transient waveform digitizer (TWD) such as the Transiac model 2008 to digitize video (RS-170) information. The purpose of this module is to limit unnecessary handling of useless information in the digitizer by selecting a critical part of the picture for digitizing. The module does this by producing bursts of clock pulses which instruct the waveform digitizer when to sample. The horizontal and vertical start,stop, and resolution are settable and readable through CAMAC. DESCRIPTION The vertical start and stop coordinates are loaded in counters from their respective latches during the video's vertical sync pulse. The vertical start counter counts lines until the designated region is reached, then enables the digitizer's clock. The stop counter continues to count until it drops out of the designated region, thus disabling the clock. The horizontal counters are loaded in the same manner as the vertical except that they begin from the horizontal sync pulse. The start counter counts clock pulses until the designated region is reached, then enables the digitizer's clock. The horizontal stop counter coutinues until out of the region on that line, at which point it disables the clock. Vertical coordinates are set from 0-255 and horizontal coordinates are 0-511. The stop coordinates must be larger than the start in both the vertical and horizontal directions. The vertical and horizontal resolution counters continuously reload themselves from their respective latches at the end of each count sequence. The vertical resolution is gated with the designated region, then with the horizontal resolution which has been gated with the pixel clock. The culmination of all this determines the digitizer's clock. SPECIFICATIONS
VIDEO DIGITIZER CLOCK INTERFACE (VDCI) Page 58-2 Inputs: o Video In -- Video signal from camera terminated in 75 Ohms. o Beam Trig -- Beam related negative edge trigger NIM signal terminated in 50 Ohms. Outputs: o Video Sum -- The digitizer clock is summed with the video with the video signal then run into a TV monitor to give a "highlighted" visual representation of the area being digitized. o Video Out -- The video signal is buffered through a current amplifier which feeds the digitizer's input signal. o Stop Trig -- When an F25*A0 is issued to the module, it waits for a beam trigger and a vertical sync, then sends a positive edge trigger TTL pulse to the digitizer. This triggers the digitizer and insures that the memory contains that last beam pulse. o Dig. Clk -- Positive edge trigger TTL clock tells the digitizer when to sample the input signal. 50 Ohm driver. CAMAC COMMANDS o F0 A0: Read horizontal start coordinate (R1-R9) o F0 A1: Read horizontal stop coordinate (R1-R9) o F0 A2: Read vertical start coordinate (R1-R8) o F0 A3: Read vertical stop coordinate (R1-R8) o F0 A4: Read horizontal resolution (R1-R4) o F0 A5: Read vertical resolution (R1-R4) o F16 A0: Write horizontal start coordinate (R1-R9) o F16 A1: Write horizontal stop coordinate (R1-R9) o F16 A2: Write vertical start coordinate (R1-R8) o F16 A3: Write vertical stop coordinate (R1-R8) o F16 A4: Write horizontal resolution (R1-R4) o F16 A5: Write vertical resolution (R1-R4) o F25 A0: Starts the stop trigger process. DRAWING PACKAGE NUMBER 233-903 RESPONSIBLE ENGINEER D. G. Brown