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45.1 GENERAL DESCRIPTION . . . . . . . . . . . . . . 45-1
45.2 PROTECTION CONSIDERATIONS . . . . . . . . . . . 45-1
45.3 OPERATION . . . . . . . . . . . . . . . . . . . 45-2
45.4 INPUTS . . . . . . . . . . . . . . . . . . . . . 45-3
45.4.1 TIMING INPUTS . . . . . . . . . . . . . . . . 45-3
45.4.2 CAMAC INPUTS . . . . . . . . . . . . . . . . . 45-3
45.4.3 FRONT PANEL INPUTS . . . . . . . . . . . . . . 45-3
45.4.4 INTERNAL JUMPERS . . . . . . . . . . . . . . . 45-4
45.5 OUTPUTS . . . . . . . . . . . . . . . . . . . . 45-4
45.5.1 Modulator Trigger . . . . . . . . . . . . . . 45-4
45.5.2 Bi-Phase Modulator . . . . . . . . . . . . . . 45-4
45.5.3 RF Drive Switch . . . . . . . . . . . . . . . 45-4
45.5.4 Monitors . . . . . . . . . . . . . . . . . . . 45-5
45.5.5 CAMAC Status Register . . . . . . . . . . . . 45-5
45.5.6 INDICATORS . . . . . . . . . . . . . . . . . . 45-5
45.6 TIMING . . . . . . . . . . . . . . . . . . . . . 45-6
45.7 SECTOR STANDBY PATTERNS . . . . . . . . . . . . 45-7
45.8 CAMAC FUNCTION CODES . . . . . . . . . . . . . . 45-8
45.9 DRAWING PACKAGE NUMBER . . . . . . . . . . . . . 45-8
45.10 RESPONSIBLE ENGINEERS . . . . . . . . . . . . . 45-8
45.11 REFERENCES AND NOTES . . . . . . . . . . . . . . 45-8 CHAPTER 45 SUBBOOSTER INTERFACE (SBI)
45.1 GENERAL DESCRIPTION The SUBBOOSTER INTERFACE module provides the triggers for the subbooster modulator, the bi-phase RF modulator, and the RF Drive switch. Triggers are provided as "pulse-pairs", that is two pulses for STANDBY and ACCELERATE operation of the sector's klystrons. Additionally, a external signal, the ACCELERATE PERMISSIVE is required to allow the triggers to come at the time required to allow the main klystrons to accelerate beam. The SBI is designed to trigger the subbooster at the trigger rates of 360, 180, or 120 pulse-pairs per Second. The SUBBOOSTER RF DRIVE UNIT (reference 1) is the associated support device which requires inputs from the timing system for a RF Switch and a Bi-Phase modulator.
45.2 PROTECTION CONSIDERATIONS One of the three independent considerations for beam containment for the accelerator revolve around the need to insure that the klystrons are unable to accelerate a stray beam down the accelerator with enough energy to damage equipment or compromise personnel shielding around experimental areas. Personnel Protection considerations are handled through interlocks on the klystron power supplies, and are not related to the SBI. What follows is a short subset of the approved Beam Containment interlocks for the SBI. (reference 2). The SLC timing system is much more flexible, allowing guns, subboosters and klystrons to pulse at arbitrarily specified times. The new proposal sets the whole sector to standby via the subbooster trigger unit (the SBI), as follows: 1. Subboster beam time pulses will require a DC permissive signal originating from CCR and transmitted to each sector on separate wires. Removal of this signal causes the subboosters to pulse twice (as usual) but at the staggered
SUBBOOSTER INTERFACE (SBI) Page 45-2 standby designated for each sector and at a later (uncritical) time, delayed by a fixed (say 50 microsecond) amount from the standby time. 2. Local switches, inaccessible from the front panel, but readable from the VAX, will be used to set the standby time for each subbooster. Delays will be 26.8, 35.4,
44.0, 52.6 and 61.2 microseconds. (note 3) 3. A software inhibit in the Master Pattern Generator will stop high power "accelerate" triggers, setting the klystrons to a standby time when the beam containment trip occurs. This is not a safety item but is required for thermal stability of klystrons.
45.3 OPERATION The SBI may produce a pulse-pair of signals for each beam crossing. Both pulses are identical and are closely spaced (25-60 uS). Any specific beam pulse will fall into one of the following categories: o Normal Operation -- The trigger sequences are started by both the Accelerate Trigger (channel 6) and the Standby Trigger (channel 7). The Accelerate Enable input must be true. o Backup Operation -- If the Accelerate Trigger fails to come, or comes outside of the acceptance window, two triggers are provided. The first trigger follows the Standby Trigger, the second appears approximately 45 microseconds later. o Non-Accelerate Operation -- If the Accelerate Enable is not present, the triggers will be the same as Backup operation. o Non-Triggered -- SLC operations will have the subboosters trigger at a rate of less than 360 pulse-pairs per second. Operation in this mode is allowed by not supplying either Accelerate or Standby during the forbidden time slots. o Error Condition -- Both the Accelerate and the Standby triggers MUST arrive within a window of the expected time to be accepted. The Standby window is selected by jumpers set internal to the module. (see later). If either is out of time, the Status register will record the error, and the triggers will be generated as "non-accelerate" or "non-triggered", or the standby pulse will be completely absent.
SUBBOOSTER INTERFACE (SBI) Page 45-3
45.4 INPUTS The SBI receives inputs from the SLC Timing Upper Backplane, driven by a PDU, the CAMAC bus, the Front Panel, and from internal STBY delay jumpers.
45.4.1 TIMING INPUTS o Channel 6 -- Accelerate Trigger. This is a program type channel which must be active on any pulse which is accompanied with a klystron in the sector. o Channel 7 -- Standby Trigger. This is a reuse type trigger which should be active at a rate of 360, 180, or 120 PPS. The timing of this channel must be in strict agreement with the table at the end of this chapter. o Channel 8 -- Back Phase -- This is a program type trigger which must be active if the phase of the sector is to be "flipped" on this pulse, making the klystrons in this sector electron-deccelerators or positron-accelerators. The timing must follow the fiducial and preceed the modulator trigger. o 119 MHz Clock -- The SBI uses the external clock for all time delays.
45.4.2 CAMAC INPUTS o Modulator Delay -- (F16*A0) controls the trigger delay from the start of each pulse sequence. The delay is in clock cycles of 119/4 MHz, or 4 standard PDU ticks (33.613 nanoseconds). o PSK Enable -- (F16*A1) controls whether the RF phase is flipped mid-pulse to discharge the SLED cavities. This should be enabled if and only if the SLED cavities are in the "TUNE" state. If enabled, the phase will flip 8.605 uS (1024 PDU Ticks) following the PDU Trigger.
45.4.3 FRONT PANEL INPUTS o RF Drive Inhibit -- This input is passed directly to the output stage. The signal level is low true, 0 volts resulting in normal drive.
SUBBOOSTER INTERFACE (SBI) Page 45-4 o Accelerate Enable -- This signal is required for the generation of accelerate pulses. The signal is a 24 VDC status, and is received through an opto-isolator.
45.4.4 INTERNAL JUMPERS o Standby Delay Jumpers -- The standby trigger must come within a small window of the expected time. These jumpers are used to select the proper window for each sector's delay. The three jumpers are used to select the window number. See the section on timing for timing information. Jumper Value Jumpers Jumper Value Jumpers ------------ ------- ------------ ------- STBY_1 1 I-- STBY_4 4 --I -II II- STBY_2 2 -I- STBY_5 5 I-I I-I -I- STBY_3 3 II- --I
45.5.1 Modulator Trigger The modulator trigger follows the PDU trigger by a delay which is written to the DELAY_REGISTER. The trigger is a 50 Volt pulse of 1 microsecond duration.
45.5.2 Bi-Phase Modulator The Bi-Phase modulator output is the exclusive or of the PSK pulse (8.605 uS following the trigger) and the latched Back-phase input. (XOR: (a + b = 1).)
45.5.3 RF Drive Switch The drive output is derived from the front panel input, and is not under the control of the SBI. The drive output was provided to allow the RF drive pulse width to be modulated, permitting the users to limit the effective pulse width from the subbooster. This is supplied primarily for physics experiments measuring the RF Kick of the accelerator by allowing only a fraction of the waveguide to be filled.
SUBBOOSTER INTERFACE (SBI) Page 45-5 The SBI serves as a passive buffer, allowing a user to supply an "inhibit" signal through the front panel input.
45.5.4 Monitors There are front panel LEMO connectors to allow viewing of the three outputs listed above.
45.5.5 CAMAC Status Register The Status Register contains the following: BIT Data Signal --------------------------------------------- R8 80 Accelerate Permit (Latched) R7 40 STBY 4 R6 20 STBY 2 R5 10 STBY 1 R4 08 Standby was outside window (Latched) R3 04 Accelerate Pulse seen in last 110 mS R2 02 Standby Pulse seen in last 11 mS R1 01 PSK Gate enabled Latched bits are cleared by each F0*A1 Read.
45.5.6 INDICATORS The front panel has 4 LED lamps which indicate the following conditions: o X -- CAMAC command in progress. The "X" lamp pulse is streched to 0.1 second. o BACKPHASE -- Indicates that the current pulse has been backphased. o ACCELERATE -- Indicates that in time accelerate pulses are being received. o STANDBY -- Indicates that in time standby pulses are being received.
SUBBOOSTER INTERFACE (SBI) Page 45-6
45.6 TIMING The timing inputs of the SBI are each protected by a coincidence window in accordance with the needs of the Beam Containment System. The window for the accelerate trigger is +/- 10 uS and for the Standby trigger +/- 1 uS. The following table relates the timing requirement for each of the five standby configurations. Signal Name Delay SBI Ticks PDU Ticks Standby Delay --------------- ------ --------- --------- ------------- Beam Passing 1031.3 454 Accelerate Trig 1022.0 3B6 STBY_1 Trigger 1048.8 3CF 1E780 26.8 STBY_2 Trigger 1057.4 3D7 1EB80 35.4 STBY_3 Trigger 1066.0 3DF 1EF80 44.0 STBY_4 Trigger 1074.6 3E7 1F380 52.6 STBY_5 Trigger 1083.2 3EF 1F780 61.2 The PDU trigger on channel 7 (the standby trigger) is expected to be at the time (in PDU Ticks). The STBYREFx times are provided to be used in the same spirit as TREF. It is imagined that the DataBase entries might look as follows: The SUBBOOSTER timing will preceed TREF. <:SBST:LIxx:1; @:SBSTDEF:; :PDUT: = -%PSKDLY -%TFILL; > The KLYSTRON timing will always preceed TREF by 7 uS. <:KLYS:LIxx:x1; @:KLYSDEF:; :PDUT: = %KLYSPDUT; > The SBST standby delay will bear the same time relationship to STBYREFx as the programmed channel did to TREF. <:TRBR:LIxx:2; @:TRBRDEF:; :PDUT: = %STBYDEFx - (tref for this crate) -%PSKDLY -%TFILL; :TMSK: = %(either 306, 180, or 120 pps TMSK); > The KLYSTRON standby delay will preceed STBYREFx by 7 uS. <:PDU :LIxx:x; .... :REUT: = %STBYLIxx + %KLYSPDUT; > The BACKPHASE trigger will preceed anything intresting. <:SBBP:LIxx:1; @:SBBPDEF:; :PDUT: = -1000; >
SUBBOOSTER INTERFACE (SBI) Page 45-7
45.7 SECTOR STANDBY PATTERNS The following is the official list of the sector-by-sector standby delay patterns for the SLAC Linear Accelerator. Klystrons are grouped by the SLC Control System micro-cluster which controls them, which is the same as implied by their DataBase name. Sector Standby-delay-num microseconds -------------------------------------------- LI00 STBY_1 1 27.7 LI01 STBY_1 1 27.7 LI02 STBY_5 5 62.1 LI03 STBY_2 2 36.3 LI04 STBY_4 4 53.5 LI05 STBY_1 1 27.7 LI06 STBY_3 3 44.9 LI07 STBY_5 5 62.1 LI08 STBY_2 2 36.3 LI09 STBY_4 4 53.5 LI10 STBY_1 1 27.7 LI11 STBY_3 3 44.9 LI12 STBY_5 5 62.1 LI13 STBY_2 2 36.3 LI14 STBY_4 4 53.5 LI15 STBY_1 1 27.7 LI16 STBY_3 3 44.9 LI17 STBY_5 5 62.1 LI18 STBY_2 2 36.3 LI19 STBY_4 4 53.5 LI20 STBY_1 1 27.7 LI21 STBY_3 3 44.9 LI22 STBY_5 5 62.1 LI23 STBY_2 2 36.3 LI24 STBY_4 4 53.5 LI25 STBY_1 1 27.7 LI26 STBY_3 3 44.9 LI27 STBY_5 5 62.1 LI28 STBY_2 2 36.3 LI29 STBY_4 4 53.5 LI30 STBY_1 1 27.7 DR03 STBY_1 1 27.7 DR13 STBY_1 1 27.7 EP01 STBY_1 1 27.7
SUBBOOSTER INTERFACE (SBI) Page 45-8
45.8 CAMAC FUNCTION CODES FnCode Function Data Lines QX Response ----------------------------------------------------- F0*A0 Read Delay Register (R1-R8) Q=X=1 F0*A1 Read Status (R1-R8) Q=X=1 F16*A0 Write Delay Reqister (W1-W8) Q=X=1 F16*A1 Set PSK Enable (W1) Q=X=1 F19*A0 Module Reset Q=0, X=1 Z*S2 Module Reset Q=X=0 The module is disabled for approximately 100 milliseconds following a module reset.
45.9 DRAWING PACKAGE NUMBER 233-000
45.10 RESPONSIBLE ENGINEERS M. Browne / K. Jobe
45.11 REFERENCES AND NOTES 1. The SUB-BOOSTER RF DRIVE UNIT (239-001) is fully described in a manual prepared by Mike Mitchell 9/84. 2. The SLAC Radiation Committee references are: - Beam Containment Shut-Off - - Rev. I, TO: A. Boyarski, chairman of the radiation committee, FROM: K. Crook, April 17, 1985. - Minutes of the Radiation Committee Meeting of April 21, TO: Radiation Committee, FROM: J. Jasburg, May 2, 1985. 3. The delays proposed to the Radiation Committee were tentatively 25.815, 34.420, 43.025, 51.630 and 60.235. The values actually supported by the SBI were used in the summary.