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35.1 GENERAL DESCRIPTION . . . . . . . . . . . . . . 35-1
35.2 SPECIFICATIONS . . . . . . . . . . . . . . . . . 35-1
35.3 ANALOG OUTPUT . . . . . . . . . . . . . . . . . 35-1
35.4 ANALOG INPUTS . . . . . . . . . . . . . . . . . 35-2
35.5 DIGITAL INPUT . . . . . . . . . . . . . . . . . 35-2
35.6 DIGITAL OUTPUT . . . . . . . . . . . . . . . . . 35-2
35.7 DIGITAL DAC SIGNALS (FOR OPTIONAL EXTERNAL DAC) 35-3
35.8 RAMPING RATES . . . . . . . . . . . . . . . . . 35-3
35.9 POWER SUPPLY REQUIREMENTS . . . . . . . . . . . 35-3
35.10 OPERATING TEMPERATURE RANGE . . . . . . . . . . 35-4
35.11 SPECIAL FEATURES . . . . . . . . . . . . . . . . 35-4
35.11.1 DAC = 0 Output . . . . . . . . . . . . . . . . 35-4
35.11.2 Self-test Mode . . . . . . . . . . . . . . . . 35-4
35.11.3 DAC Monitor Mode . . . . . . . . . . . . . . . 35-4
35.12 SPECIAL PRECAUTIONS . . . . . . . . . . . . . . 35-4
35.12.1 Analog Inputs . . . . . . . . . . . . . . . . 35-4
35.12.2 Power On . . . . . . . . . . . . . . . . . . . 35-4
35.12.3 Software Protection . . . . . . . . . . . . . 35-5
35.13 CAMAC COMMANDS . . . . . . . . . . . . . . . . . 35-5
35.14 PIN CONNECTIONS . . . . . . . . . . . . . . . . 35-6
35.15 LOWER CONNECTOR J2 AMP 204731-2 . . . . . . . . 35-6
35.16 UPPER CONNECTOR, J1 AMP 204731-2 (OPTIONAL USE) 35-7
35.17 DRAWING PACKAGE NUMBER . . . . . . . . . . . . . 35-7
35.18 RESPONSIBLE ENGINEER . . . . . . . . . . . . . 35-7 CHAPTER 35 POWER SUPPLY CONTROLLER (PSCII)
35.1 GENERAL DESCRIPTION The Power Supply Controller II is a single-width CAMAC module designed to control and monitor a "large" power supply. It supplies an analog voltage from a DAC for the set point. It accepts two analog voltages from shunts or transductors. Optically coupled digital signals are provided for power supply control and status monitoring. The module includes a built-in ramping function and self-test features. PSCII differs from the original PSCI (135-563) in the following ways: o 16-bit DAC instead of 14-bit DAC. o 16-bit ADC instead of 14-bit ADC. o A second ANALOG input replaces the ripple monitor function.
35.2 SPECIFICATIONS
35.3 ANALOG OUTPUT o 0 to +10V. o Single-ended. o 16-bit DAC (Hybrid Systems DAC 9377-16-6). o +/- 0.0015% of FSR Integral Linearity. o Output impedance less than 30 Ohms. o Output capable of 5 milliAmps. o Peak-to-peak noise less than 1mV.
POWER SUPPLY CONTROLLER (PSCII) Page 35-2 o Absolute accuracy +/- 0.01% of FSR at 20 degrees Celsius. o Temperature stability +/- 5PPM/degrees Celsius.35.4 ANALOG INPUTS o 0 to +10V o Differential input 1E7 Ohms input impedance. o 80 db. (min) of CMR with up to 10V of common mode. o 16-bit integrating ADC (Intersil ICL/7104-16). o +/-.005% integral linearity. o Integration time 133.2 msec. (8 cycles of 60 Hz). o Overall conversion time 0.6 sec max. o Absolute accracy +/-.005% of FSR at 20 degrees Celsius. o Temperature stability +/- 1PPM/degrees Celsius.
35.5 DIGITAL INPUT o Eight bits provided. o Optically coupled (+/- 48V max isolation). o Minimum ON current to be externally provided, 0.5 milliAmps. o Maximum ON current to be externally provided, 10 milliAmps. o Voltage range 3V to 30V. o Reverse protection included.
35.6 DIGITAL OUTPUT o Six bits provided; two pulsed, 0.50 sec +/- 10%, 4 latched. Note: FSR means "Full Scale Range" and is 20V for +/- 10V range, 10V for +/- 5V range, etc.
POWER SUPPLY CONTROLLER (PSCII) Page 35-3 o Optically coupled (+/- 48V max. isolation). o ON voltage, 1V typical @ 30 milliAmp. o OFF voltage, 30V max. o Reverse protection provided.35.7 DIGITAL DAC SIGNALS (FOR OPTIONAL EXTERNAL DAC) o 16 bits provided. o TTL positive true. o Low level output current - 24 milliAmp max @ 0.5V max. o High level output current of 10 milliAmp min @ 2V min. o Outputs are tri-stated during self-test. o Clock signal provided - data stable on positive edge. o Connector pin assignments compatible with PSCI.
35.8 RAMPING RATES o Full scale ramping rates of 1094.4 sec, 545.6 sec, 272.8 sec,
136.32 sec, 68.16 sec, 17.04 sec, 4.256 sec. Note: these can be modified by circuit board jumper.
35.9 POWER SUPPLY REQUIREMENTS o +6V o +24V o -24V
POWER SUPPLY CONTROLLER (PSCII) Page 35-435.10 OPERATING TEMPERATURE RANGE o To be tested.
35.11 SPECIAL FEATURES
35.11.1 DAC = 0 Output A special digital output is provided that is in the ON state when the DAC digital register is set to "zero", the equivalent of 0V output. This is an optically coupled output with the same specs as Digital Output.
35.11.2 Self-test Mode In this mode of operation the DAC is internally connected to the ADC, the Analog Output is 0V, and Analog Input is disconnected. In self-test a "no ramping" option is available to speed operations. Due to the nature of the ADC, there must be a delay of 0.92 sec (min) in reading the ADC after the DAC is changed. When an external DAC is used, self-test mode checks internal operaton of PSC module only. Digital DAC output signals are zero in self-test mode.
35.11.3 DAC Monitor Mode In this mode of operation the ADC is internally connected to the DAC, but the Analog Output follows the DAC in the normal way. Do not attempt to read the ADC while the DAC is ramping.
35.12 SPECIAL PRECAUTIONS
35.12.1 Analog Inputs When switching between Analog inputs, any read cyclies must be delayed
0.92 seconds to assure a meaningful data read cycle.
35.12.2 Power On After power is turned ON it is recommended to perform a Z operation in the crate to ensure that the module is properly initialized.
POWER SUPPLY CONTROLLER (PSCII) Page 35-535.12.3 Software Protection To protect power supplies against the effects of software errors, entry and exit to/from the self-test mode is protected. See the CAMAC coding.
35.13 CAMAC COMMANDS o F0 A0: Read set point register using R1-R16 in binary. o F16 A0: Write set point register using W1-W16: 0=0V; start ramping. o F17 A0: Write ramping rate register if permissible. Q=0 if not. W3 W2 W1 Full Scale Ramping Time (Sec) __ __ __ _____________________________ 0 0 0 1094.4 0 0 1 545.6 0 1 0 272.8 0 1 1 136.32 1 0 0 68.16 1 0 1 17.04 1 1 0 4.256 1 1 1 No Ramp (self-test only) o F1 A0: Read ramping rate register, R1-R3. o F27 A0: Test ramping status; Q=0 means ramping in progress, or DAC register not equal to set point register. Q=1 means DAC register = set point. o F0 A1: Read ADC register (last measurement) on R1-R14, in binary. Q=0 indicates data is invalid. o F17 A1: Select ADC input mode. Q=0 if not permitted. W2 W1 Input __ __ _____________ 0 0 Analog2 input 0 1 Analog1 input 1 0 DAC Out Monitor 1 1 Self-test o F1 A1: Read ADC input mode on R1, R2. o F16 A2: Write Digital out register, W1-W6, W1 and W2 are pulsed outputs, 0.50 sec. in width.
POWER SUPPLY CONTROLLER (PSCII) Page 35-6 o F0 A2: Read Digital Out Register R1-R6, Read Digital Input, R9-R16. o Z*S2: Set all internal registers to zero except ADC data register. o X: X=1 on all commands. o Q: Q=1 on all valid commands, except where indicated. o Power on: Same as Z.35.14 PIN CONNECTIONS
35.15 LOWER CONNECTOR J2 AMP 204731-2 + - Channel R/W _________________________________________________________ A1 A2 Digital Output, Pulsed 0.5 sec 1 W1 A3 A4 Digital Output, Pulsed 0.5 sec 2 W2 A5 A6 Digital Output, Latched 3 W3 A7 A8 Digital Output, Latched 4 W4 A9 A10 Digital Output, Latched 5 W5 A11 A12 Digital Output, Latched 6 W6 B1 B2 Digital Output, DAC=0V. B3 B4 Analog Output B5 B6 Digital Input 1 R9 B7 B8 Digital Input 2 R10 B9 B10 Digital Input 3 R11 B11 B12 Digital Input 4 R12 C1 C2 Digital Input 5 R13 C3 C4 Digital Input 6 R14 C5 C6 Digital Input 7 R15 C7 C8 Digital Input 8 R16 C9 C10 Analog2 Input C11 Ground shield for Analog Output
POWER SUPPLY CONTROLLER (PSCII) Page 35-735.16 UPPER CONNECTOR, J1 AMP 204731-2 (OPTIONAL USE) A1 DAC Bit 3 B7 DAC Bit 12 A3 DAC Bit 4 B9 DAC Bit 13 A5 DAC Bit 5 B11 DAC Bit 14 A7 DAC Bit 6 C1 DAC Bit 15 A9 DAC Bit 7 C3 DAC Bit 16 A11 DAC Bit 8 C5 CLOCK B1 DAC Bit 9 C7 DAC Bit 2 B3 DAC Bit 10 C9 DAC Bit 1 B5 DAC Bit 11 C11,12 GND
35.17 DRAWING PACKAGE NUMBER 137-072
35.18 RESPONSIBLE ENGINEER W. B. Pierce