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34.1 GENERAL DESCRIPTION . . . . . . . . . . . . . . 34-1

34.2 SPECIFICATIONS . . . . . . . . . . . . . . . . . 34-1

34.3 ANALOG OUTPUT . . . . . . . . . . . . . . . . . 34-1

34.4 ANALOG INPUT . . . . . . . . . . . . . . . . . . 34-2

34.5 DIGITAL INPUT . . . . . . . . . . . . . . . . . 34-2

34.6 DIGITAL OUTPUT . . . . . . . . . . . . . . . . . 34-2

34.7 DIGITAL DAC SIGNALS (FOR OPTIONAL EXTERNAL DAC) 34-3

34.8 RAMPING RATES . . . . . . . . . . . . . . . . . 34-3

34.9 POWER SUPPLY REQUIREMENTS . . . . . . . . . . . 34-3

34.10 OPERATING TEMPERATURE RANGE . . . . . . . . . . 34-3

34.11 SPECIAL FEATURES . . . . . . . . . . . . . . . . 34-3

34.11.1 DAC = 0 Output . . . . . . . . . . . . . . . . 34-3

34.11.2 Self-test Mode . . . . . . . . . . . . . . . . 34-4

34.11.3 DAC Monitor Mode . . . . . . . . . . . . . . . 34-4

34.11.4 Ripple Measurement . . . . . . . . . . . . . . 34-4

34.12 SPECIAL PRECAUTIONS . . . . . . . . . . . . . . 34-4

34.12.1 Analog Input . . . . . . . . . . . . . . . . . 34-4

34.12.2 Power On . . . . . . . . . . . . . . . . . . . 34-4

34.12.3 Software Protection . . . . . . . . . . . . . 34-4

34.13 CAMAC COMMANDS . . . . . . . . . . . . . . . . . 34-5

34.14 NORMAL BIT ASSIGNMENTS WITH EMHP INTERFACE . . . 34-6

34.15 PIN CONNECTIONS . . . . . . . . . . . . . . . . 34-6

34.15.1 lower Connector j2 amp 204731-2 . . . . . . . 34-6

34.15.2 Upper Connector, J1 Amp 204731-2 (Optional use) 34-7

34.16 DRAWING PACKAGE NUMBER . . . . . . . . . . . . . 34-8

34.17 RESPONSIBLE ENGINEERS . . . . . . . . . . . . . 34-8 CHAPTER 34 POWER SUPPLY CONTROLLER (PSC)

34.1 GENERAL DESCRIPTION The Power Supply Controller is a single width CAMAC module designed to control and monitor a "large" power supply. It supplies an analog voltage from a DAC for the set point, and accepts an analog voltage from a shunt or transductor which it measures with an ADC. Optically coupled digital signals are provided for power supply control and status monitoring. The module includes a built-in ramping function, power supply ripple monitoring, and self-test features.

34.2 SPECIFICATIONS

34.3 ANALOG OUTPUT o 0 to +10V. o Single-ended. o 14 bit DAC (Hybrid Systems DAC 9377-16-4). o +/- 0.003% of FSR Integral Linearity. o Output impedance less than 30 Ohms. o Output capable of 5 milliAmps. o Peak-to-peak noise less than 1mV. o Absolute accuracy +/- 0.01% of FSR at 20 degrees Celsius. o Temperature stability +/- 5PPM/degrees Celsius.


POWER SUPPLY CONTROLLER (PSC) Page 34-2

34.4 ANALOG INPUT o 0 to +10V o Differential input 1E7 Ohms input impedance. o 80 db. (min) of CMR with up to 10V of common mode. o 14 bit integrating ADC (Intersil ICL/7104-14). o +/-.005% integral linearity. o Integration time 33.33 mS. (2 cycles of 60 Hz). o Overall conversion time 0.15 sec max o Absolute accracy +/-.01% of FSR at 20 degrees Celsius. o Temperature Stability +/- 5PPM/degrees Celsius.

34.5 DIGITAL INPUT o Eight bits provided. o Optically coupled (+/- 48V max isolation). o Minimum ON current to be externally provided, 0.5 milliAmps. o Maximum ON current to be externally provided, 10 milliAmp. o Voltage range 3V to 30V. o Reverse protection included.

34.6 DIGITAL OUTPUT o Six bits provided; two pulsed, 0.50 sec +/- 10%, 4 latched. o Optically coupled (+/- 48V max. isolation). o ON voltage, 1V typical @ 30 milliAmp. o OFF voltage, 30V max. o Reverse protection provided.


POWER SUPPLY CONTROLLER (PSC) Page 34-3

34.7 DIGITAL DAC SIGNALS (FOR OPTIONAL EXTERNAL DAC) o 14 bits provided. o TTL positive true. o Low level output current -24 milliAmp max @ 0.5V max. o High level output current of 10 milliAmp min @ 2V min. o Clock signal provided - data stable on positive edge.

34.8 RAMPING RATES o Full scale ramping rates of 136.3 sec, 68.2 sec, 34.1 sec,

17.04 sec, 8.52 sec, 2.13 sec, 0.532 sec.

34.9 POWER SUPPLY REQUIREMENTS o +6V @ 1.1A o +24V @ 40 milliAmp. o -24V @ 34 milliAmp.

34.10 OPERATING TEMPERATURE RANGE o 0 to 60 degrees Celsius.

34.11 SPECIAL FEATURES

34.11.1 DAC = 0 Output A special digital output is provided that is in the ON state when the DAC digital register is set to "zero." the equivalent of 0V output. This is an optically coupled output with the same specs as Digital Output.


POWER SUPPLY CONTROLLER (PSC) Page 34-4

34.11.2 Self-test Mode In this mode of operation the DAC is internally connected to the ADC, the Analog Output is 0V., and Analog Input is disconnected. In self-test a "no ramping" option is available to speed operations. Due to the nature of the ADC, there must be a delay of 0.230 sec (min) in reading the ADC after the DAC is changed.

34.11.3 DAC Monitor Mode In this mode of operation the ADC is internally connected to the DAC, but the Analog Output follows the DAC in the normal way. Do not attempt to read the ADC while the DAC is ramping.

34.11.4 Ripple Measurement In this mode the ADC is connected to an AC coupled ripple circuit which converts average ripple at the Analog Input to DC. This circuit works over the range 10 HZ to 1 KHZ with about +/- 10% accuracy. For AC signals in the range 10mV-100mV peak to peak the gain factor is about 12., e.g., 100mV peak to peak results in an ADC reading of about

1.2V. The circuit works by performing full wave rectification followed by averaging.

34.12 SPECIAL PRECAUTIONS

34.12.1 Analog Input If the analog input is not used, it should be externally shorted. At all times the analog input should be restricted to +/- 10V. New units (Mod D) have an internal resistor which makes shorting the inputs unnecessary.

34.12.2 Power On After power is turned ON it is recommended to perform a Z operation in the crate to ensure that the module is properly initialized.

34.12.3 Software Protection To protect power supplies against the effects of software errors entry and exit to/from the self-test mode is protected. See the CAMAC coding.


POWER SUPPLY CONTROLLER (PSC) Page 34-5

34.13 CAMAC COMMANDS o F0 A0: Read set point register using R1-R14 in binary. o F16 A0: Write set point register using W1-W14: 0=0V; start ramping. o F17 A0: Write ramping rate register if permissible. Q=0 if not. W3 W2 W1 Full Scale Ramping Time (Sec) __ __ __ _____________________________ 0 0 0 136.3 0 0 1 68.2 0 1 0 34.1 0 1 1 17.04 1 0 0 8.52 1 0 1 2.13 1 1 0 0.532 1 1 1 No Ramp (self-test only) o F1 A0: Read ramping rate register, R1-R3. o F27 A0: Test ramping status; Q=0 means ramping in progress, or DAC register not equal to set point register. Q=1 means DAC register = set point. o F0 A1: Read ADC register (last measurement) on R1-R14, in binary. Q=0 indicates data is invalid. After selection of ADC input mode is made, there must be a delay of at least 0.2 sec. before reading ADC. o F17 A1: Select ADC input mode. Q=0 if not permitted. W2 W1 Input __ __ _____________ 0 0 Analog in 0 1 Ripple Circuit 1 0 DAC Out Monitor 1 1 Self-test Entry and exit to/from self-test mode permitted only when DAC=0 and ramping rate is not 0 sec. o F1 A1: Read ADC input mode on R1, R2. o F16 A2: Write Digital out register, W1-W6, W1 and W2 are pulsed outputs, o.50 sec. in width. o F0 A2: Read Digital Out Register R1-R6, Read Digital Input, R9-R16.


POWER SUPPLY CONTROLLER (PSC) Page 34-6 o Z*S2: Set all internal registers to zero except ADC data register. o X: X=1 on all commands. o Q: Q=0 except where specifically indicated. o Power on: Same as Z.

34.14 NORMAL BIT ASSIGNMENTS WITH EMHP INTERFACE W R BIT Usage _ __ ____ _________________________________ 1 0001 Turn PSC DC ON (Pulsed) 2 0002 Remote Reset (Pulsed) 3 0004 Enable DC ON (Latched) 4 0008 Set Reverse Polarity (Latched) 5 0010 unused 6 0020 unused 9 0100 Power Supply Interlocks OK 10 0200 Magnet Interlocks OK 11 0400 System Ready 12 0800 DC On status 13 1000 Polarity or Receiving Triggers 14 2000 unused 15 4000 unused 16 8000 unused

34.15 PIN CONNECTIONS

34.15.1 lower Connector j2 amp 204731-2 + - Channel R/W _________________________________________________________ A1 A2 Digital Output, Pulsed 0.5 sec 1 W1 A3 A4 Digital Output, Pulsed 0.5 sec 2 W2 A5 A6 Digital Output, Latched 3 W3 A7 A8 Digital Output, Latched 4 W4 A9 A10 Digital Output, Latched 5 W5 A11 A12 Digital Output, Latched 6 W6 B1 B2 Digital Output, DAC=OV.


POWER SUPPLY CONTROLLER (PSC) Page 34-7 B3 B4 Analog Output B5 B6 Digital Input 1 R9 B7 B8 Digital Input 2 R10 B9 B10 Digital Input 3 R11 B11 B12 Digital Input 4 R12 C1 C2 Digital Input 5 R13 C3 C4 Digital Input 6 R14 C5 C6 Digital Input 7 R15 C7 C8 Digital Input 8 R16 C9 C10 Analog Input C11 Ground shield for Analog Output

34.15.2 Upper Connector, J1 Amp 204731-2 (Optional use) A1 DAC Bit 1 A3 DAC Bit 2 A5 DAC Bit 3 A7 DAC Bit 4 A9 DAC Bit 5 A11 DAC Bit 6 B1 DAC Bit 7 B3 DAC Cit 8 B5 DAC Bit 9 B7 DAC Bit 10 B9 DAC Bit 11 B11 DAC Bit 12 C1 DAC Bit 13 C3 DAC Bit 14


POWER SUPPLY CONTROLLER (PSC) Page 34-8 C5 CLOCK C11,12 GND

34.16 DRAWING PACKAGE NUMBER 135-563

34.17 RESPONSIBLE ENGINEERS D. Horelick and H. Kang


 
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