Go to bottom of page
20.1 INTRODUCTION . . . . . . . . . . . . . . . . . . 20-1
20.2 DESCRIPTION . . . . . . . . . . . . . . . . . . 20-1
20.2.1 Package Format . . . . . . . . . . . . . . . . 20-2
20.2.2 Scan Modes . . . . . . . . . . . . . . . . . . 20-3
20.2.3 Data Buffer Format . . . . . . . . . . . . . . 20-4
20.2.4 TDV Register Format . . . . . . . . . . . . . 20-5
20.3 DRAWING PACKAGE NUMBER . . . . . . . . . . . . . 20-6
20.4 RESPONSIBLE ENGINEER . . . . . . . . . . . . . . 20-6 CHAPTER 20 MULTIBUS CAMAC DRIVER (MBCD)
20.1 INTRODUCTION The MBCD is the interface through which CAMAC opperations are carried out by the 8086 Single Board Computers (SBCs). The MBCD is a multimaster device which executes "Channel" programs directly from multibus memory. CAMAC opperations are performed over the SLC standard serial highway using the SLC Serial Crate Controller (SCC). Transmission is carried out at a 5 Mbit/s serial rate. Typical CAMAC cycle times are between 12 and 15 microseconds per word depending on the scan mode that is used. NOTE: CAMAC dataway cycle time is aprox. 1 microsecond.
20.2 DESCRIPTION The MBCD is a single multibus board which performs the same scan modes as the SLAC Branch Driver Type II and data acceptance conditioned by CAMAC Q and X responses, similar to the VAX CAMAC Channel (VCC). It contains two registers accessible through Multibus: The Start Input Output register [multibus port 120H], and the Test DeVice (TDV) register [multibus port 122H]. CAMAC operations are initiated by writing the multibus segment address of a CAMAC "package" to the SIO (the offset portion of the address must be zero). The SIO register is actually a FIFO, allowing, in principle, access from multiple SBC's or multiple tasks. In practice, however, time restrictions require that, with the exception of the master beam trigger interrupt routine, this feature not be used. Once the SIO has been loaded, the MBCD fetches the first 6 words (16 Bit) of the CAMAC Package. These 6 word blocks are referred to as CAMAC packets. Upon completion of a package of operations, a facility exists for triggering a completion interrupt through the Pattern Receiver Interrupt Multiplexer, (PRIM) [Multibus address 206H]. However, given the time restrictions of the system, the software overhead of servicing the interrupt exceeds the wait time required, for most if not all operations, and this feature is not used at this time.
MULTIBUS CAMAC DRIVER (MBCD) Page 20-2 The TDV register contains diagnostic information from the last operation. However, because the software does not know its own last operation is the MBCD's last operation, this information (apart from the BUSY bit), will be used only in desperation, and is not integrated into the software in any coherent way.
20.2.1 Package Format A CAMAC package consists of an arbitrary number of 6-word CAMAC packets in the following format: Word 0: CTLWLO = Low order CAMAC control word. Word 1: CTLWHI = High order CAMAC control word. Word 2: DATOFF = Data buffer address offset Word 3: DATSEG = Data buffer address segment Word 4: WCMAX = Maximum word count Word 5: CIC = Completion interrupt code CTLWLO = CCCC|NNNN|Nxxx|AAAA 8421|1842|1 |8421 |6 | | Bits 0-3 = AAAA = Module subaddress. 4-6 = xxx = Not used (yet). 7-11 = NNNNN= Station address 12-15 = CCCC = Crate address CTLWHI = MXXQ|QPII|SSSF|FFFF PMMM|M2NL|CNA1|8421 C121|24 Q| 6| Bits 0-4 = FFFFF= CAMAC function code. 5-7 = SSS = Enables scan mode counters. (See Scan Modes below.) 5 = SA = Enable subaddress counter. 6 = SN = Enable station address counter. 7 = SC = Enable crate counter. 8-9 = II = Scan Increment mode (see Scan Modes below). 8 = ILQ = Increment enabled counters only if Q=0. 9 = IN = Reset least significant enabled counter and increment next most significant enabled counter if X=0. 10 = P24 = 24-bit pack mode. If set, data are read as 32-bit words sign-extended from 24 bits. If reset, data are read as 16-bit words left truncated from 24 bits.
MULTIBUS CAMAC DRIVER (MBCD) Page 20-3 11-14 = XXQQ = Transfer/terminate mode (See Scan modes below.) 11 = QM2 = Terminate packet if Q=0. 12 = QM1 = Transfer data iff Q=1. 13 = XM2 = Terminate packet if X=0. 14 = XM1 = Transfer data iff X=1. 15 = MPC = 0 if last packet of package; otherwise More Packets Coming. DATOFF, DATSEG ..are the offset and segment portions of the the data buffer to be used for the packet. (See Data Buffer Format below.) WCMAX ..(14 bits only) is the maximum word (not byte) count to be transferred for this packet. NOTE: For non-data CAMAC commands (F8=1) WCMAX must be zero if the CAMAC packet is expected to terminate after a single CAMAC operation (i.e. if you want the operation to terminate on "word count" rather than scan mode terminators). NOTE - TIME RESTRICTION: The MBCD has a built in hardware timeout. This timeout has been set at 1 msec for SLC operation to allow the master beam trigger interrupt routine to access the CAMAC system. Thus no CAMAC operation (complete Package) may take longer than 1 msec to complete. Block transfers should be limited to approximately 70 Words. CIC ..is completion interrupt code, of which only the least significant byte is used. CIC = PPPPSIII where 4321 421 Bits 0-2 = III specify the interrupt number (0-7). 3 = S is 1 to set the interrupt, 0 to clear it. In this application S=1, since we want to fire the interrupt. 4-7 = PPPP specify the Programmable Interrupt Controller(s) (PIC ; 1-4) to be used. More than 1 PIC may be specified (to interrupt multiple SBCs), and PPPP=0 is effectively a no-op.
20.2.2 Scan Modes Scan modes are controlled by the fields SSS, XXQQ, and II. SA, SN, and SC enable the subaddress, station, and crate counters respectively. The subaddress counter is the least significant counter, and the crate counter is most significant.
MULTIBUS CAMAC DRIVER (MBCD) Page 20-4 Setting XM1 or QM1 allows actual data transfers only if X=1 (if XM1 set) or Q=1 (if QM1 set). Packet operations are terminated by maximum word count transferred (n.b. this is always zero for non-data transfer operations (F8=1)), or by X=0 if XM2 is set, or by Q=0 if QM2 is set, or by the overflow of the most significant enabled counter. (A overflows beyond 15, N beyond 23, and C beyond 23.) Incrementing of enabled counters is controlled by II as follows: IN ILQ 0 0 Increment the least significant counter each CAMAC cycle. On overflow, reset the least significant counter and increment the next-most-significant counter. 0 1 Increment the least significant counter if and only if Q=0. On overflow, reset the least significant counter and increment the next-most-significant counter. 1 0 Increment the least significant counter each CAMAC cycle. On overflow, reset the least significant counter but do NOT increment the next-most-significant counter. If and only if X=0, reset the least significant counter and increment the next-most-significant counter. 1 1 Increment the least significant counter if and only if Q=0. On overflow OR X=0, reset the least significant counter and increment the next-most significant counter.
20.2.3 Data Buffer Format Each CAMAC packet (as opposed to CAMAC package) has an associated data buffer whose format is as follows: word 0 = STAT0 1 = STAT1 2-n = DATA where |CCCC|NNNN|NDCB|EEXQ|SL--|word|-cou|nt-- STAT = |8421|1842|1NTA|OM |HA | | | | |6 | EOR|SS |EM | | | and STAT = STAT1//STAT0 STAT0=Summary error and remaining word count: bits 0-13 = Remaining word count after packet completion.
MULTIBUS CAMAC DRIVER (MBCD) Page 20-5 14 = LAM, indicating that some enabled module on the branch is asserting LAM. bit 15 = Summary hardware error: the OR of the BTO, BOO, and PTO bits of the TDV register (see below). STAT1=Last crate and module + termination status: bit 0 = Q on last CAMAC cycle. 1 = X on last CAMAC cycle. 2 = EMS = End-Mode-Signal indicating that the packet was terminated by specified (non-zero) XM2, QM2 conditions. 3 = EOS = End-Of-Scan indicating that the packet was terminated by the overflow of the most significant counter. 4 = BAR = BARrow indicating that the packet was terminated by RWC=0. 5 = CTO = Camac TimeOut indicating that the packet was terminated by a CAMAC timeout (n.b. this bit is NOT included in the summary hardware error bit). 6 = DNE = DoNE is set if the CAMAC package (as opposed to packet) is complete. 7-11 = NNNNN = station address of last CAMAC cycle. 12-15 = CCCC = Crate address of last CAMAC cycle.
20.2.4 TDV Register Format Bit 0 = DNE = Done (as above) but only valid if DNE=1. (i.e. useless.) 1 = ERR = Summary hardware error as above. 2 = LAM = LAM asserted as above 3 = BTO = multi-Bus TimeOut. 4 = CTO = CAMAC timeout as above 5 = BOO = Buffer Offset Overflow, indicating that the data buffer offset address overflowed (a no-no).
MULTIBUS CAMAC DRIVER (MBCD) Page 20-6 6 = PTO = Package TimeOut, indicating that the total package was unable to complete within the MBCD timeout period. 7 = BSYN = BuSY Not = MBCD is free. NOTE: During MBCD operations, the TDV register is used for frivolous purposes so that BITS 0-6 ARE MEANINGFUL ONLY IF BSYN=1.
20.3 DRAWING PACKAGE NUMBER 123-604
20.4 RESPONSIBLE ENGINEER M. Browne