CPE Software Engineering

 

VxWorks Target:  <NODENAME>

The node is a vxWorks target used for <project application> data acquisition and control
  • CPU
  • Network Infomation
  • VxWorks Boot Parameters
  • Console Port
  • Crate Profile
  • Memory Map
  • Microname - <4 character SLC microname alias>

    • CPU

    Model MVME2700-3441
    Manufacturer Motorola 
    Serial Number
    Operating System VxWorks
    Processor
    Processor Speed ???MHz
    Numeric Coprocessor None
    Coprocessor speed N/A
    Read Access Memory ???MB
    Video Memory None
    Hard Drive None
    Physical Dimensions B-Size VMEbus Module
    Slot Requirments 1 slot
    SLAC ID
    Location B62

    I/O Transition Module

    Model MVME761-001
    Manufacturer Motorola 
    Serial Number
    SLAC ID
    Location B62

    Network Information

    The assigned ip address of this type of node must be within the internet free zone (IFZ).
     
    Node Name <nodename>.slac.stanford.edu
    IP Address 134.79.177.207
    Primary User Luchini, Kristi
    System Administrator Luchini, Kristi
    Default Gateway/Route 134.79.179.1
    Subnet Mask 255.255.252.0
    Subnet Bits 6
    Domain Name Service YES
    SLAC Domain Name Servers 134.79.176.11
    Subnet LEBnet

    VxWork Boot Parameters

    boot device dc
    processor number 0
    host name opi00gtw00
    file name ioc/<nodename>/vxWorks
    inet on ethernet (e) <ip address of node>:fffffc00
    inet on backplane (b)
    host inet (h) 134.79.51.48
    gateway inet (g) 134.79.179.1
    user (u) vxworks
    ftp password (pw) (blank=use rsh)
    flags (f) 0x8
    target name (tn) <nodename>r
    startup script (s) ioc/<nodename>/startupE
    other (o)

    Crate Profile

    Slot No. Model Description
    1 <model number of the cpu>
    <model number of the transition module, if required>
    2 Spare
    3 Spare
    4 Spare
    5 Spare
    6 Spare
    7 Spare
    8 Spare
    9 Spare
    10 Spare
    11 Spare
    12 Spare
    13 Spare
    14 Spare
    15 Spare
    16 Spare
    17 Spare
    18 Spare
    19 Spare
    20 Spare
    21 Spare

    Memory Map

    Describe the memory map for this ioc in table form if possible.
     
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    Owner: <authors name>
    Last modified:  Mike Zelazny (zelazny): New ESD Software Page