BIC Bit3 Help

BIT-3 is used to share data between the Bunch Injection Controller (ie: bic06pep00) and the following nodes:

LER Bunch-by-bunch current monitor (ie: bic06her00)
HER Bunch-by-bunch current monitor (ie: bic06her00)
Master Pattern Generator (ie: mp00)

The three bars show the local node status register for each BIT-3 Adaptors (ie: her,ler,mpg). If the BIT-3 Adapter is working, only the "Always on" bit is on. Other bits portend ill. If there is a problem, see below.

The REALLOC MPG Memory should only be needed if testing in simulation mode, which is used when the MPG is not available.

The MPG queue pointers are shown below:

and allows

for a dump of the MPG header or queues to standard I/O.

The "Reset" button is available for each BIC (ie: bic06pep00) bit3 Adapter. This is used to clear any communication errors seen in the local node status register.

Shared Memory Link

The BIC ioc (bic06pep00) has three bit-3 adaptor modules installed. Each of these adaptor modules are connected via a serial link to a bit-3 adapter module in the

HER Bunch-by-bunch monitor VXI crate (bic06her00)
LER Bunch-by-bunch monitor VXI crate (bic06ler00)
Master Pattern Generator MultiBus crate (mp00)

In the case of the MPG and BIC adaptors, the distance between the two is longer than is allowed for a serial link. Therefore, two fiber optic boxes were installed between the two adaptor modules.

The bit-3 shared memory is referred to as Dual-Port RAM or DPR. The DPR is located on a piggy-back module that is attached to one of a pair of bit-3 adapter module. From the perspective of the BIC (bic06pep00) all DPR is located on the remote bit-3 adapter module.

Bunch-by-bunch Current Monitor

A BxBCM VXI crates exists for each ring and both are located in the rack to the left of the BIC VME crate (bic06pep00). If you look at the BIT-3 cards in the VXI crate, the local and remote leds on the module blink when an access occurs.Therefore, the local led should be almost steady and the remote led will blink once per second when the BIC fetches data from the shared memory.

The BIC bit-3 DPR addresses for the BxBCM are

HER - 0xF0010000

LER - 0xF0020000

For a quick check, at an offset of 0x6004 from the base DPR addresses given above, a counter changes by approximately 100 at a rate of 1Hz.

bic06pep00->d 0xF0016004,1,4


The BIT-3 DPR can be examined by logging into the BIC (ie: bic06pep00). Howeve,this is a privleged account and a password is required. The example below shows a problem reading the 16 bit (second line should really be all 555555555):

 (login to the BIC)
MCCDEV>rlogin bic06pep00
(look at the MPG/BIC shared memory)
-> d 0xf0000000,11,4
f0000000: 00010400 00000000 00002560 40450540 *..........%`@E.@*
f0000010: 45454545 45454545 45454545 45454545 *EEEEEEEEEEEEEEEE*
f0000020: 014d05c5 454542c5 c5462147 *.M..EEB..F!G....*
value = 21 = 0x15
(deposit some 5s and Fs in the second row)
-> m 0xf0000010
f0000010: 4545-5555
f0000012: 4545-ffff
f0000014: 4545-^D
value = 1 = 0x1
(look again - oops, still bad)
-> d 0xf0000000,11,4
f0000000: 00010400 00000000 00002560 40450540 *..........%`@E.@*
f0000010: 4545efef 45454545 45454545 45454545 *EE..EEEEEEEEEEEE*
f0000020: 014d05c5 454542c5 c5462147 *.M..EEB..F!G....*
value = 21 = 0x15
-> logout

The memory can also be examined from the MPG side via the BIC panel or Network-> network diagnostics -> BIT3 Diagnostics. The file describing the layout of memory is REF_C_INC:MPG_PEP2INJ_TYPES.H. The problem above was caused by a bad cable, with a loose connection, by the way.