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From: Support <support@silicon-software.de>
To: "Chaiken, Alison" <alison@slac.stanford.edu>
Date: Tue, 24 Aug 2010 04:20:14 -0700
Subject: Re: microEnable IV Quotation
Thread-Topic: microEnable IV Quotation
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Hello Alison Chaiken,
the PCIe-Interfaces are plug&play. The me4-board with 4 lanes is also compa=
tible to the PCIe x16, but the performance is equal to the PCIe x4.  We hav=
e tested our boards with more than 40 motherbords. My reference are motherb=
oards (for example Asus P6T7 WS SuperComputer) with Intel x58Express chips =
and PCIe x4 or faster PCIe-Interfaces. Then  you have only with our boards =
(me 4-AD4-CL/VD-10L) the support for the new DMA900 technology, which trans=
fer rates up to 900MByte/s make possible. We have also the 10tap-CL-support=
.
In my sense we have  the highest performance with this transfer rate today.
Best regards,
Thomas Ritter


Am 23.08.2010 18:38, schrieb Alison Chaiken:
Thomas Ritter wrote:
in the PCIe x16-Interface the performance will be the same as in PCIe x4. B=
ecause the me4 fx4/vd4/VQ4 support only the 4 lanes of PCIe. As note: If yo=
u have the me4 fx1/vd1, you have only 1 lane and therefore less performance=
 as the the me4 fx4/vd4, but you can mount it also in PCIe x1-interface.
Since we're getting the FULL configuration of the microEnable IV card with =
special on-board compression firmware from pco, I'll make sure that we go f=
or PCIe x4 or PCIe x16 then.   Thanks for the clarification.    In a couple=
 of places I had read that on some boards the PCIe x16 slot has a specializ=
ed configuration for video output, so I guess I need to check the motherboa=
rd specs to make sure that isn't the case.   Can you tell me which motherbo=
ards the microEnable IV FULL V-series has been tested with?   Thanks again.


--
Alison Chaiken                          alison@slac.stanford.edu<mailto:ali=
son@slac.stanford.edu>
(650) 926-2755 [checked nearly never]   http://exerciseforthereader.org/
I've got stacks in my structs, I've got arrays in my queues,
I've got the segmentation-violation, core-dumped blues.
-- Rick Moen






--
Dipl.-Ing. Thomas Ritter

Support
Silicon Software GmbH

Steubenstr. 46
68163 Mannheim
Germany

[p]  +49(0)621.789 507 0
[f]  +49(0)621.789 507 10
[e]  support@silicon-software.de<mailto:support@silicon-software.de>
[w]  wwww.silicon-software.com

--------------------------------

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    Hello Alison Chaiken,<br>
    the PCIe-Interfaces are plug&amp;play. The me4-board with 4 lanes is
    also compatible to the PCIe x16, but the performance is equal to the
    PCIe x4.&nbsp; We have tested our boards with more than 40 motherbords.
    My reference are motherboards (for example Asus P6T7 WS
    SuperComputer) with Intel x58Express chips and PCIe x4 or faster
    PCIe-Interfaces. Then&nbsp; you have only with our boards (me
    4-AD4-CL/VD-10L) the support for the new DMA900 technology, which
    transfer rates up to 900MByte/s make possible. We have also the
    10tap-CL-support. <br>
    In my sense we have&nbsp; the highest performance with this transfer ra=
te
    today. <br>
    Best regards,<br>
    Thomas Ritter<br>
    <br>
    <br>
    Am 23.08.2010 18:38, schrieb Alison Chaiken:
    <blockquote cite=3D"mid:4C72A405.4010502@slac.stanford.edu"
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      Thomas Ritter wrote:
      <blockquote cite=3D"mid:4C72491F.7080208@silicon-software.de"
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        <p class=3D"MsoNormal"><span style=3D"" lang=3D"EN-GB">in the PCIe
            x16-Interface the performance will be the same as in PCIe
            x4. Because
            the me4 fx4/vd4/VQ4 support only the 4 lanes of PCIe. As
            note: If you
            have the me4 fx1/vd1, you have only 1 lane and therefore
            less
            performance as the</span><span style=3D"" lang=3D"EN-GB"> the
            me4 fx4/vd4</span><span style=3D"" lang=3D"EN-GB">, but you can
            mount it also in PCIe x1-interface.</span></p>
      </blockquote>
      Since we're getting the FULL configuration of the microEnable IV
      card
      with special on-board compression firmware from pco, I'll make
      sure
      that we go for PCIe x4 or PCIe x16 then.&nbsp;&nbsp; Thanks for the
      clarification.&nbsp;&nbsp;&nbsp; In a couple of places I had read tha=
t on some
      boards
      the PCIe x16 slot has a specialized configuration for video
      output, so
      I guess I need to check the motherboard specs to make sure that
      isn't
      the case.&nbsp;&nbsp; Can you tell me which motherboards the microEna=
ble IV
      FULL
      V-series has been tested with?&nbsp;&nbsp; Thanks again.<br>
      <br>
      <pre class=3D"moz-signature" cols=3D"72">--=20
Alison Chaiken				<a moz-do-not-send=3D"true" class=3D"moz-txt-link-abbrevi=
ated" href=3D"mailto:alison@slac.stanford.edu">alison@slac.stanford.edu</a>
(650) 926-2755 [checked nearly never]	<a moz-do-not-send=3D"true" class=3D"=
moz-txt-link-freetext" href=3D"http://exerciseforthereader.org/">http://exe=
rciseforthereader.org/</a>
I've got stacks in my structs, I've got arrays in my queues,
I've got the segmentation-violation, core-dumped blues.
-- Rick Moen


</pre>
    </blockquote>
    <br>
    <br>
    <pre class=3D"moz-signature" cols=3D"72">--=20
Dipl.-Ing. Thomas Ritter

Support
Silicon Software GmbH

Steubenstr. 46
68163 Mannheim
Germany

[p]  +49(0)621.789 507 0
[f]  +49(0)621.789 507 10
[e]  <a class=3D"moz-txt-link-abbreviated" href=3D"mailto:support@silicon-s=
oftware.de">support@silicon-software.de</a>
[w]  wwww.silicon-software.com

--------------------------------

Sitz der Gesellschaft/Registered Office: Mannheim, Germany
Registergericht/Commercial Register: Mannheim HRB 7553
Gesch&auml;ftsf&uuml;hrer/Executive Managers: Dr. Ralf Lay, Dr. Klaus-Henni=
ng Noffz


Diese E-Mail kann Betriebs- oder Gesch&auml;ftsgeheimnisse oder sonstige ve=
rtrauliche Informationen enthalten. Sollten Sie diese E-Mail irrt&uuml;mlic=
h erhalten haben, ist Ihnen eine Kenntnisnahme des Inhalts, eine Vervielf&a=
uml;ltigung oder Weitergabe der E-Mail ausdr&uuml;cklich untersagt.
Bitte benachrichtigen Sie uns und vernichten Sie die empfangene E-Mail. Vie=
len Dank.

This e-mail may contain trade secrets or privileged, undisclosed, or otherw=
ise confidential information. If you have received this e-mail in error, yo=
u are hereby notified that any review, copying, or distribution of it is st=
rictly prohibited. Please inform us immediately and destroy the original tr=
ansmittal. Thank you for your cooperation.
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