! For reference, here is what some of the IDIM bits
! actually are:
! DIM1 bit 0: CID BCS
! DIM1 bit 1: Master beam control bit 1.
! DIM1 bit 2: Master beam control bit 2.
! DIM1 bit 3: Master beam control bit 3.
! DIM1 bit 4: HER BEAMABORT.
! DIM1 bit 5: LER BEAMABORT.
.
.
.
! DIM1 bit 10: Master beam control bit 4.
! DIM1 bit 11: Master beam control bit 5.
! DIM1 bit 12: Master beam control bit 6.
! DIM1 bit 13: Master beam control bit 7.
! DIM1 bit 14: Master beam control bit 8.
You have to change the bit mask in the relevant primary. For A-line,
ALMK and ALMV are the primaries which need to be modified. (XLMK and XLMV
masks must be identical for whichever RLAREA!)
So here's what they look like:
!!! Masks defining which DIM bits can request "A-line" ratelimiting
!!! Please add new bits to both ALMK and ALMV lists below. Thanks.
! DIM1 DIM1 DIM2 DIM2 DIM3 DIM3
! 15-0 31-16 15-0 31-16 15-0 31-16
:ALMK: = 00003, 00000, 00000, 00000, 00000, 00000, ! ZERORATE
00004, 00000, 00003, 00000, 00000, 00000, ! LIMIT_LO
00008, 00000, 00000, 00000, 00000, 00000, ! INJLIMHI
00400, 00000, 00000, 00009, 00000, 00000; ! LIMIT_HI
:ALMV: = 00003, 00000, 00000, 00000, 00000, 00000, ! ZERORATE
00004, 00000, 00003, 00000, 00000, 00000, ! LIMIT_LO
00008, 00000, 00000, 00000, 00000, 00000, ! INJLIMHI
00400, 00000, 00000, 00009, 00000, 00000; ! LIMIT_HI
To read the primary, the first six fields (comma delimited) are valid
masks for requesting ZERORATE. Conveniently, every six fields are put
into a row with a comment following stating the rate-limit state
applicable. So to read what can cause LIMIT_HI in the Aline RLAREA, the
relevant line is
00400, 00000, 00000, 00009, 00000, 00000; ! LIMIT_HI
You see a '4' in the third column of the first comma delimited field.
That is equivalent to DIM1, bit 10 'on'. Let's look at how this works:
The first super-column(refering to the group vertically of comma
delimited fields) contains DIM1 bits 0-15. Each super-column is divided
into five columns, least significant bit to the right. So the fifth
column in the first super-column contains bits 0-3. In order for a bit to
be asserted or 'on', a number corresponding to that bit must be set. For
the first bit in each column, that number is '1'. The second bit in each
column is '2', third is '4', and fourth is '8'. So in the preceding
example,
00400 is equivalent to stating that
^^^
|||
|||bit0 off, bit1 off, bit2 off, bit3 off
||
||bit4 off, bit5 off, bit6 off, bit7 off
|
|bit8 off, bit9 off, bit10 on (4), bit11 off
In order to have more than one bit asserted, the numbers corresponding to
each bit must be added in HEX. IE, DIM1 bit9, bit10, bit11 all on would
be equivalent to 2 + 4 + 8 = E, or 00E00. So if you were to change a bit
where one existed previously, you would need to add that bit to the
current one (or the converse for the inverse case).
(HVS Jan 2004) Also, a template for changing the paper-word-strip under the physical buttons in MCC lives on EOIC Desk PC Z: drive as an EXCEL file.