VxWorks for PowerPC
Architecture Supplement
5.5
Contents
1 Introduction
2 Building Applications
Defining Compiler Options
Compiling Modules for GDB
3 Interface Variations
Small Data Area
HI and HIADJ Macros
Memory Management Unit
AltiVec Support
4 Architecture Considerations
Divide-by-Zero Handling
Processor Mode
26-bit Addressing
Byte Order
Hardware Breakpoints
PowerPC Register Usage
Caches
Floating-Point Support
VxMP Support for Motorola PowerPC Boards
Exceptions and Interrupts
Memory Layout
5 Reference Materials
General PowerPC Documents
Motorola PowerPC MPC74xx and AltiVec
Development Reference Documents
PPC405GP Development Reference Documents
PPC440GP Development Reference Documents