EPICS SUPPORT FOR VME SIAM

      FUNCTIONAL DETAILS
      ------------------

      The software model of the SIAM implemented for EPICS corresponds to
      the card's functions rather than being a strict mapping of the
      registers.

      There are 11 software channels as described in detail below.

      To specify a particular SIAM channel in gdct, select the DTYP SIAM.
      Then, in the Form, put the SIAM's card number in Card and the channel
      number in Signal.  For bi and bo, specify a bit in Parm by using the
      character shown below to represent that bit.  The example databases
      in this release demonstrate channel and bit specification.

      The record types bi, bo, and mbbiDirect are supported for SIAM.
      The bo record type is supported only on channels 0-8.


      Channels 0-7 correspond to the 8 hardware channels on the SIAM.
              Input bits:                     Output bits:
                      2 - T - Trip                  1 - I - Set Inhibit
                      1 - I - Inhibit               0 - R - Reset
                      0 - O - OK
      
      Channel 8 is card-wide control and status.
              Input bits:                     Output bits:
                      6 - S - Test Switch State     0 - T - Test
                      5 - T - Test Inhibit          1 - R - Reset all
                      4 - I - Inhibit Lock          2 - I - Inhibit all
                      3 - F - 12-Volt Failure
                      2 - D - Daisy-chain Active
                      1 - A - Alarm
                      0 - V - VME Test State

      For channels 9-11, the bit specification character for bi is the
      hex digit representing the bit number.  Examples: bit 0 is
      specified with '0'; bit 15 with 'F'.

      Channel 9 is a Reset Mask for the 8 hardware channels.
              Output bits:                    Input bits:
                      7 - Reset Channel 7             (last value
                      6 - Reset Channel 6              written to
                      ...                              output bits)
                      0 - Reset Channel 0
      
      Channel 10 is the SIAM ID register.
              Input bits:
                      15-8 - SIAM Personality Module ID bits 7-0
                       7-0 - SIAM ID bits 7-0

      Channel 11 is the Inhibit Read register.
              Input bits:
                      7 - Last value written to channel 7 inhibit
                      6 - Last value written to channel 6 inhibit
                      ...
                      0 - Last value written to channel 0 inhibit


      ADDRESS SWITCHES
      ----------------

      The high 16 bits (4 hex digits) A23-A8 are set by the DIP
      switches SWP1/2, reading bottom-to-top with "1" away from
      front panel. (The lower two implied digits, A7-A0, are zero.)

      By default EPICS expects up to 16 cards beginning at A24 address
      0x300000, as follows:

	card "D"	SWP1/2
	--------	------
	   0		 3000
	   1		 3001
	   2		 3002
	   3		 3003
	   4		 3004
	   5		 3005
	   6		 3006
	   7		 3007
	   8		 3008
	   9		 3009
	  10		 300a
	  11		 300b
	  12		 300c
	  13		 300d
	  14		 300e
	  15		 300f


      Any card may be in any VME slot; nor is it necessary to have
      contiguous values.

      If you need to use non-default addresses, please consult
      and EPICS "expert" in order to modify either "module_types.h"
      or add code to "module_types.c".



      VERIFICATION
      ------------

      After the IOC is initialized,

	dbior "drvSIAM"

      should produce a report:

        Driver: drvSIAM
        SIAM:   card 0
        SIAM:   card 1


      ----------------------------------------------------------------------
                                                          Susanna Jacobson
                                                               Steve Lewis
                                     Lawrence Berkeley National Laboratory
                                                              Feb 12, 1998