ZPD Troubleshooting
How to tell if a ZPD is healthy, and what to do if it isn't (or doesn't appear to be)
Getting started
Compile and load the ZPD libraries, then run
zpdtest. This will run a series of tests:
- Internal consistency checks for each board,
e.g., does the Fitter configuration match the Finder firmware?
- Consistency checks between boards,
e.g., do they all have the same firmware?
- Memory tests of each diagnostic memory in each FPGA
- Bus tests between the FPGAs
- LUT contents check
- Algorithm test
- Multiple board readout test
At the end it will print a summary that might look something like:
----- ZPD test summary -----
ZPD 0 1 2 3 4 5 6 7
slot 1 3 5 7 9 b d f
------------------------+------------------------------------------------
Consistency check ..................... FAIL ..................... <-- !
Diag Mem Test pass pass pass pass pass pass pass pass
MegaBus Test pass pass pass pass pass pass pass pass
Fit Results Bus Test pass pass pass pass pass pass pass pass
LUT contents ..................... FAIL ..................... <-- !
Algorithm test ..................... pass .....................
Multiple board read ..................... pass .....................
Previous information will give some indication of why a given test failed.
What might go wrong, and what to do about it
Consistency check fails
If you haven't configured the ZPDs (via fcgui or similar) the consistency
checks will fail because the basic parameters (block 1 addresses 0x11-0x1d)
haven't been loaded. Try configuring the ZPD and running zpdTest again.
Alternate: Loading the Fitter LUTs with:
zloadluts "./DczConfig/zpd/zpdFitter.lut"
will also load the basic parameters. Then try zpdTest again.
Otherwise there might be a genuine consistency problem, e.g., different
firmware versions in different boards. Hopefully the specific consistency failure
will tell you what to fix.
Diagnostic memory tests fail
Past problems with this have been due to:
- Digital Clock Managers losing lock. Sending command 0x14 with the
dcmreset command should fix the memory test problems if the DCM
lock is the source of the problem. Hopefully these DCM problems have been
fixed and won't appear again.
- c/dclk and dlink phase problems. See
how to adjust the dlink phase.
- Timing constraint violations. Try implementing the Decoder/Driver and/or
the FPGA with the problem memory with tighter timing constraints.
Megabus or Fit Results Bus test fails
The only problem we have had with this was due to a DCM lock failure.
Try sending command dcmreset to fix it.
LUT contents check fails
Try configuring the ZPDs, or loading the LUTs with:
zpdloadluts "./DczConfig/zpd/zpdFinder.lut", etc.
Algorithm test fails
Check to make sure that the test vector file has the same IP correction
assumptions as you have loaded in the ZPD.
[More information...]
Isolate the problem piece by using algotest with different
source and destination memories.
Try the same test on a different ZPD to see if the problem is a hardware/simulation
mismatch (in which case you blame the software for not simulating the hardware
correctly) or whether different ZPDs produce different results (in which case
it sure smells like a hardware problem...)
Multiple board read test fails
If this fails, it is likely due to a dlink phase problem. Try
reading out boards one at a time to see if they are individually
healthy, and see
how to adjust the dlink phase.
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