Run 5 L1/L3 startup tasks Update Jan/3/05 Run 5 L1/DCZ startup tasks -------------------------- Before Run startup: Remaining tasks: 1) GLT Match&combine firmware fix + test (Su Dong, Yifan Liang) A more resilient problem than expected. Complete rewrote register code and test in progress. Also wait for possible line configuration change. 2) GLT alg/mem test calibrations (Valerie) The instrastructure fully working. Test results agree with input. Checking analysis code in progress. Need to wrap it up as a complete utility. 3) Update hardware DB for many new (and old) items (Su Dong, YawMing) TSFi's are done, but GLTi, ZPDi, and BLTi are not in yet. Need to wait for database migration? 4) ODF damage check for DCZ for L1 online and FastMon For L1 online, Rainer and Gregory will figure out what and how to implement. (pending for discussion) For FastMon, Selina worked on board damage output to a histogram for monitoring. (done) DCZ Improvements/Studies which can come later after we start: 1) Expand TSF testing to include checks on BLT output data (YawMing, Dan?) 2) ZPD IP correction has a slight +ve vs -ve track effect. Some gains in PT and Z resolution may be possible if we can fix this. (Kris, Masahiro) This is a visible but small effect, and the ZPD firmware will need to be worked on if this is to be done. 3) Can we adjust ZPD stretch +1 CLK8 ? 4) TSFi/ZPDi repairs for more spares (Xuedong, Selina) 5) Repiar 3rd BLT DAQ (Su Dong, Selina) 6) More TSF spares (Scott) 7) Use the calibration framework to test output for TSF, ZPD, and interface. (Fang) ********************************* L1/DCZ startup tasks completed: 1) TSF panel installation + testing (Jamie, YawMing, Mike Perry, Su Dong) All extenders+panels installed. (Oct/15) Panel ~200um too wide: Milled down to 7.9". (Oct/25) Extender plate interfere with backplane connection: Clipped region near backplane bar (Oct/25) Clipped region around the 5 way P2 connector. (Oct/28) Some backside pins extruding too far interfering insersions: snipped the long pins. (Oct/25-28) 2) TSF->BLT firmware (Marc/Jamie/Yawming) Two issues remaine from July: a) The version with TSF DAQ working perfectly had significant BLT data problems, while the version with BLT data path working had some DAQ issues. b) BLT A track efficiency lower by ~2%. Identified problem as a TSF BLT output VHDL problem, SL 6,7 swapped. Final version of firmware fixed both. (Oct/28). 3) TSFi/ZPDi clamps and cable redressing Fixed some back of crate pins while slots emptied. (Su Dong) Rack cable support fixtures. (Gibson/Ray) ZPDi cable clamp modified. TSFi cable clamps made. (Howard/Su Dong) Recabling TSFi/ZPDi/BLTi done Oct/15. (Su Dong, Jamie, Yawming) Corrected several cabling errors. Done Oct/28. (Su Dong,Jamie,Yawming) 4) Checking the TSFY crate powerup problem (Su Dong, Ray R) Done. Flaky PSU moved to DCT TSFY. (Sep/04) 5) Critical spares TSF: (Jamie,Manchester) 5 repaired prod TSFs shipped and 4 tested OK. We have 24 good prod +1 good preprod + 4 good proto. Situation now OK for startup (Oct/15). BLT: (Su Dong) BLT from old DCT crate FC PROMed as DCZ BLT and cosmic test looked ok. Now we have a validated spare. The DCLK series resistor also checked to be al lthe same=400Ohms. (Oct/28) Interface: (Xuedong) Two spare GLTis completed cosmic tests. 4483 has a stuck Y bit. 4484 is completely OK and validated with high stat and is now the operating board.. 6) TSF validation for L3 (Jamie+ L3) Tests done. L3 group is satisfied. (Oct/16). 7) Make DCZ cosmic configuration. Done Oct/29. (Su Dong, Rainer) Also adjusted time delay for DCZ BLT. 8) GLT online update (Valerie) GLT config cleanup, CSR2 fix. Test done. Cosmic data validation also looked OK. (Oct/21) . 9) TSF->ZPD transmission appear s to have a 10% dip in the X0 data. This was traced to an analysis code bug. So we never had this problem. (Su Dong) 10) Updating ODC TSF mon panel display for new TSFY slots (Nicolas) Done. 11) Among the larger local TSF differences between new and old, the SL9 region still needs a clearer conclusion. Swapped in old TSF spare cleared the problem. (YawMing) 12) TSF SL6,8 TSF neighbor boundary 0.5% level seeing DCZ TSF segments only. After re-commissioning, the problem only reminaed on SL8. Looks like occassoinal noisy segments on new TSF at neighbor region. This probably has negligible effect; 13) DCT/EMT->GLT cable check L1FMon code (Jim Burke) 14) OprMon Hbook->Root plot conversion (Kris) (Jan/21/05) 15) L1Fmon house keeping (Kris) a) JAS header problem (Jan/28/05) 16) DCZ BLT DAQ data problem (Jamie, Su Dong, Selina) Many tests done. Cornered the problem to be really a config code issue. (Feb/8/05) 17) DCT online parasite<->default switch (Jamie) TSF 6 bit LUT into DB as default (Feb/15/05) Swap DCT<->DCZ TC flavors (Feb/15/05) Data check from L1TNtuple all OK. L3 running with new TSF TC. 18) TSF data tick tick2->tick4 (Rainer, Jamie) Ran this week. Wire address appeared to be wrong as seen in L3 and L1Fmon. Wire address format inconsistency found in code. One more tag to test... done (Mar/8/05) 19) OprMon minimal addition of DCZ (Kris) done (Mar/8/05) 20) DCZ fastmon -> JAS (Kris) done (Mar/10/05) Merged DCZ and DCT Fmon. Need DCZ prod data for final testing. (Need tcl changes to work for prod DCZ) Adding TSF->DCZ transmission test in progress. Adding/replacing JAS plots First version in IR2. Needs better reference. TSF vs DTSF display not working (abandon for JAS or test ?) 21) TSF board status/LED check/cleanup (LED def label) (YawMing) 3 new TSF boards (+5 prototype) available for spares (done Mar/15/05) 22) IFT: Top+bottom replaced by LST ! but the Majority OR logic still the same as IFR. First tests done. Timing split between RPC/LST. Need IFS modification.(Davide, Maurizio, Selina, Su Dong) Maurizio Lo Vetere is working on re-programming in VHDL. done. (Mar/23/05) 23) Get all config param into DB (done, Mar/28/05) TSF/BLT/ZPD DAQ delay offset + persistency (Jamie) ready BLT mask, ZPD config persistency (Jamie) ready ZPD config transient split (Olya) done Testing/connecting DB perssistency->transient->config (Olya) (LUT calc code for ROM neds modifications) 24) L1 line config study for startup strategy (Su Dong, Al) (Mar/29/05) Conclusion: the last configuration used for July/04 test runs is good enough to start Run 5. 25) GLT FC 80us delay removal + test (Su Dong, Aug/16/05) New BLT FC not compatible with GLT. Needs to identify the correct GLT FC version as starting point to reroute. 26) L1Fmon house keeping (Kris) a) Integrate DCT/EMT->GLT cable check -> PS archive (needs 16 series compatible version from Jim/Dan) done b) New OEP end run PS archive production ? done it's here finally ! c) L1GltObj overlay scale (or switch to input mask?) done 27) EMT->GLT data related Elf crash (Dan) done 28) EMT online d_boolean (Dan) done 29) Efficiency of the M trigger for FastMon. (Dan) done, Dec 2005 Dan has plots for Bhabha's and mu-pairs in OPR mon. 30) L1Glt word into CM2/Mini ! (Rainer) *************************** L1 Simulation/Offline Tasks (should all have been completed already) --------------------------- All need to addressed before 1st SP MC production for Run 5 and startup of the reprocessing/resim. 1) Debug PTD L1sim algorithm (Eric) 2) L1sim integration (Eric) Framework tcl code to switch on old/new detector vailadtion package to check simulation results 3) ZPD digi making to be completed (Eric) (wire phi & cell info) 4) TrgConfig upgrade (Rainer) - Detector version - TrgConfig full param set for GLT - Create TrgEnv 5) GLT L1sim coding and testing (Valerie) - Create GltEnv (Sim latency parameters to be handled at one place: GLTi Should be conditions data. Hardcode for now) 6) L1Sim TSF->BLT reducer (Eric) Needs expanded TSF testing on TSF->BLT output (YawMing) 7) BLT mask sim implementation (Eric) 8) Check EMT signal time alignment between each other (Eric) Tasks completed * Map out the BLT mask bits on BLT board in teststand (Nicolas) =========================================================================== Run 5 L3 tasks in priority order -------------------------------- 1) Need to get Opr monitoring for L3 in place. (Prafulla) Tag going into release. (done) Stripchart next. 2) Get the L3TRelInfo databases for all of Runs 1-4 completed. (Prafulla with some help from Qinghua) [Run 3 missing] Run 5 needs to be done as well. 3) TSF persistency for CM2 and L3 development (Nicolas) Wait to see where they should go: Mini/Raw ? The decision was that the L1 data would go into the raw, so it would become default for the intermediate store when running Bogus/SimApp/Bear as a chain, and optional as part of Elf or Moose. 4) Revive L3TriggerDbApp for use in filter studies.(?) 5) Online luminosity information needs to be finally brought to a finished form. (Rainer?) R&D in progress: L3Dch algorithms upgrade (Arik) Tasks completed: 1) Need the L3 group to consider the results from Jamie on TSF validation for L3. Given that more studies will be done, is there any discrepancy between L3 trigger line outputs for new vs. old TSF segments which leads us to think we should preclude making the switch for Oct. 15? (all L3 members) 2) L3Fmon JAS header fix (Prafulla) Jan/28/05 2) Need to fix the trickle-injection trigger monitoring. (Prafulla) There was an XML hangup for which a fix is ready and done.