L1 trigger latency estimate
 ===========================

    DCH FEE:  ~1.5us 
    DCT path:   
                     New TSF->  New TSF->    Old TSF-> Old TSF->
                     ZPD->GLT   BLT->GLT     BLT->GLT  PTD->GLT
      GLINK->NB      0.51       0.51         0.27      0.27
      NB->TSF out    2.58       3.55         3.26      2.96
    TSFi->ZPDi/BLTi  0.17       0.03         0.03      0.03
     ZPD/BLT/PTD     2.13       0.76         0.76      0.79                
      stretch        0.13       0.13         0.13      0.40+1.07 pad
    ZPDi/BLTi->GLTi  0.03       0.03         0.03      0.03
     GLT delay       0.0        0.54         1.07      0.0         
                     -------    -----       -------    -----
                     5.55us     5.55us       5.55us    5.55us
    Some numbers are real measurements while others are derived with different
    level of believability. A star rating for the numbers will marked later.  

=> DCH FEE + DCT =   7.0 us   

   EMT FEE + EMT =   2.3+4.8 = 7.1us 

   GLT latency   =   3.3

   FCT latency   =   0.9  
   (Is this the leading bit of L1A msg ? in which case there are extra 
    ticks for ROMs to pass the L1A to freeze FEE)

   GRAND TOTAL = 7.1 + 3.3 + 0.9 = 11.3us   up to L1A delivery