BaBar Trigger Meeting Minutes for Tuesday March 11, 1997
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Material is on the Web, accessible from Trigger page buttons.


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Mar 11	"Level 1 Trigger"
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We had trouble connecting with SLAC due to phone problems there.  
Walt Innes joined in for items 4 and 7.


Simulation
==========

1. Removing the BLT validation of Axial supercells for PTD	Fred Kral 
							(for Stefan Gehrig)

See 1/3 page material by Stefan on simulation justification.  BLT
validation at most costs us a few percent of background rate.  By
removing it, we simplify the interfaces in the drift chamber trigger.
Current design actually has no interface from BLT to PTD, since PTD
sends data directly to Global Trigger.


Hardware
========

2. Trigger C and D link protocol				Fred Kral
(protocol draft needs comment from EM trigger)		(for Krista Marks)

We went over Krista's proposal for C and D link protocol, designed for
TSF card but hopefully adjustable for whole trigger.  This is
available in meeting material.

Comments:
  page 2, section 2.1 op code 1C Write CSR has 0-3 bits used, not 0-4.
		      op code 1B - Is there ever a reason to read back the
			current block address that is written with code 1B?
                      op code 1A Read Memory does not meet protocol since
			it has associated data (the 16 bits we call address).
			This is a serious problem and needs redesign.
		      op code 1A and 19 Read/Write memory - calorimeter trigger
			may need to write a bigger chunk for xilinx constants.
		      op code 17 may be needed in calorimeter trigger to be
			used to reload xilinx PROMs.  Other extra commands
			will be provided by UK engineers.
  page 4, section 3.2 CSR - EM trigger may need 32 bits of CSR.  
			Will communicate needs.


3. DC+GL board C and D link interface				(Krista Marks)
(not a presentation, just announcement of draft)


4. Global trigger table implementation in FPGA instead of LUT	Fred Kral
(this proposal needs scrutiny to make sure it does not reduce
required functionality)

*** Please see the proposal and see if some useful logic combination
is excluded by the reduced logic table implementation.


5. Status report from the UK					Paul Dauncey

Requirements have gone through another iteration.  Will be announced
when they appear on the Web.

Paul found out how many digital pins can be monitored on calorimeter
monitoring board for slow controls (EMB): 8 pins.  So for use in TSF
crates, this is too few to have individual pins for the 12 boards.  We
would then monitor just one pin as an OR of the 12 boards.  C link can
then interrogate the 12 cards and get the details of the GLINK error
condition.


6. Note UK and LBL spec repositories are available from the Trigger Web page:
  EM:     http://hepunx.rl.ac.uk/BFROOT/electronics/electronics.html
  DC+GL:  http://design.lbl.gov/BF/Trigger/specs/
(The latter is relatively new.)


7. Future Meetings and other dates

Al Eisner is unable to come to Tuesday morning meetings due to SVTELEC
conflict starting at 9am.  We may want to move the weekeday of our
meetings.

            March 25 cancelled 
            April 8 open date
            May/June - Calorimeter Trigger PDR
            June - Drift Chamber and Global Trigger PDR

See the Web page for latest info on things affecting TRIGGER group.