Draft 0.1
						July 18, 1997

L1 Trigger System DataFlow Transitions
======================================

See Cathy Cretsinger's note for an overview of L1 components and data sent,
 http://www.slac.stanford.edu/BFROOT/doc/Trigger/97/DataFlow/

Contents
________

I.   Operating Modes
II.  Transition Actions
III. Op Codes
IV.  Schedule

I. Operating Modes
__________________

A. Physics Data Taking

B. Fast Calibrations
 1. Parasitic TRG data taking during DCH or EMC fast calibration
 2. Playback patterns for TRG internal checks

All trigger boards contain only deterministic Digital Logic.
Can be tested with "Playback and Record" strategy.

To test core of each board:
 1) Download test patterns in Input Memory
 2) Play patterns through pipelined logic, recording results in Output Memory
 3) Read back Output Memory results and compare to expectations

To test interfaces, use Output Memory of upstream board to playback
into Input Memory.

(The EM trigger boards use an IOC to read out their recorded "spy"
data, instead of a ROM that is used for DC and GL triggers.)


II. Transition Actions
______________________

Only ROM actions are described below.  Data in LUTs, registers should
be in the configuration database (or pointers to files, or version
numbers of code that constructs or pads LUTs on the fly).

Config
------
  All runs:
    Read back 16-bit configuration version numbers; Compare with expectations
    If not as expected, download LUTs, registers; Read back to verify
  Playback fast calibrations:
    Download Playback Memories, set various bits that control Playback/Record

L1 Accept
---------
  All runs:
    Zero suppress data
    Format data
    Increment monitoring quantities
  Parasitic fast calibrations:
    Also keep some data in memory
  Playback fast calibrations:
    Also save all data in memory

End Minor
---------
  Parasitic fast calibrations:
    Check data against expectations to verify cable connectivity
  Playback fast calibrations:
    Read back Record Memories
    Compare actual data with expected data, flag differences (aka fatal errors)


III. Op Codes
_____________

Trigger Fast Control command specification document:
 http://design.lbl.gov/BF/Trigger/specs/fast_control/TrgFcCom.ps


IV. Schedule
____________

The L1 trigger system will need multi-ROM support for its system tests;
test stand software construction needs to begin no later than December 1997.