Trigger Simulation Data for Reconstruction (April 1997)
Overview
The trigger simulation has provided the detailed input to making the Level 1 Trigger electronics design. Engineering constraints have already been incorporated into the software representations of the algorithms. The simulation is up to date at a very
detailed level, including a complete simulation of the time domain and with overlay of simulated beam-induced backgrounds. Software filters (Level 3) are being studied to validate the trigger architecture and aid design of the online farm.
Since September 1996, a prototype interface between trgDC, the Level 1 drift chamber trigger simulation, and DchReco has been successfully used in Level 3 trigger studies. It is being retired in May 1997. (We wish to thanks to Steve Schaffner for
coding the DchReco end!)
The trigger simulation now outputs the Global Trigger output trigger lines per event (before prescaling by the Fast Control System) in the AbsEvtObj TrgDigi; when a standard is agreed upon for the time of a GEANT event, the absolute time of the trigger
will also be reported in the TrgDigi. Soon, the TSF (Track Segment Finder) board output to DAQ will also be available in the TrgDigi, including the effect of the 2-microsecond time window of the BaBar DAQ.
TrgSim also creates the AbsEvtObj TrgSimOut, which (for certain runs which contain particular physics processes) provides a crude fiducial cut on events.
See TrgSim/README file for more details.
Users
Currently, the TrgDigi and TrgSimOut are not used by other packages.
Caveats
At the present time, the background hit mixer is broken; in addition, the TrgSimApp binary has not built for the last few releases due to missing Svt and Ifr object code. |
