Projects:

• Towards a more realistic trigger simulation:
  • Step 1: new sequence and new trgDC interface to run DchMakeDigi before trgDC and use Dch Digis in trgDC. (done) (see : documentation )
  • Step 2: Obtain a correct raw digi charge distribution for improved efficiency tuning (Dch _and_ Dch TSF) (done) (see: documentation )
  • Step 3: Do efficiency tuning. (work ongoing)
  • Step 4: Background mixing. This is very important, but needs all subsystems working together. (work ongoing) (meetings on monday, 11AM, Sierra Room (mostly))
    • Study the overlay of MC and (data) background tdc times using flatbhabhas as bakcground collection. What should the shift be? This should be repeated in the new sequence. (to be done)
    • Need to subtract the L1AT0 from the data background since the MC does not have it when running before trgDC. (to be done)
• Dch volume in Bogus is mixture of gas and wire density. Missing is the ocational hardscatter off the wire. => Implementation/study hardscattering probablility in Dch volume.
• Futher update Dch material (if necasserry)
• Implementation of electronics (material) in Bogus Dch. (not urgent)
• Study of xtalk in Dch (data). How to implement something more realistic? Do we need to?

• BAD #169: "DriftChamber Simulation"

• Following webpages on efficiency tuning in 2000:
• http://www.slac.stanford.edu/~mirna/internal/update_efficiency.html
• http://www.slac.stanford.edu/~mirna/internal/efficiency_path.html
• http://www.slac.stanford.edu/~mirna/internal/folowup_efficiency_path.html
• http://www.slac.stanford.edu/~mirna/internal/efficiency_tune_1960v.html
• http://www.slac.stanford.edu/~mirna/internal/update_efficiency_tune_1960v.html
• New trg and Dch sequence:
  • http://www.slac.stanford.edu/~mirna/internal/trgdc_dchsim.html
• Raw Digi charge distribution:
  • http://www.slac.stanford.edu/~mirna/internal/digicharge.html
  • http://www.slac.stanford.edu/~mirna/internal/digicharge_update.html
  • http://www.slac.stanford.edu/~mirna/internal/digicharge_update2.html
  • http://babar-hn.slac.stanford.edu:5090/HyperNews/get/dchasoft/974.html
• Babar June 2001 Collaboration week: Dch Parallel session:
• /BFROOT/www/Organization/CollabMtgs/2001/detJun2001/Mon3b/mirna.pdf
• How To Tune Dch MC and data
  
  
  
• The old Dch simulation page

• Simulation pages (not everything is quit up to date)
• MC Production page
• Drif Chamber
• Trigger Upgrade simulation. Plans, progress and results.
• Track Eficiency Task Force 2001
• Track Efficiency Task Force 2000
• Backgrounds and Remediation at Babar

 
For comments/questions  contact mirna@slac.stanford.edu